diff options
| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-07-18 21:09:55 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-09-07 09:18:32 +0200 |
| commit | 5de124538b618c864508868eae505e77149649b7 (patch) | |
| tree | ea40b819d4569513111e04ad6044a215c6eb2c96 /hw/timer/ibex_timer.c | |
| parent | 62a09b9b4118ca42e79d9bd179daf7230462705b (diff) | |
| download | focaccia-qemu-5de124538b618c864508868eae505e77149649b7.tar.gz focaccia-qemu-5de124538b618c864508868eae505e77149649b7.zip | |
target/riscv: Simplify the check in hmode to reuse the check in riscv_csrrw_check
Just add 1 to the effective privledge level when in HS mode, then reuse the check of 'effective_priv < csr_priv' in riscv_csrrw_check to replace the privilege level related check in hmode. Then, hmode will only check whether H extension is supported. When accessing Hypervior CSRs: 1) If accessing from M privilege level, the check of 'effective_priv< csr_priv' passes, returns hmode(...) which will return RISCV_EXCP_ILLEGAL_INST when H extension is not supported and return RISCV_EXCP_NONE otherwise. 2) If accessing from HS privilege level, effective_priv will add 1, the check passes and also returns hmode(...) too. 3) If accessing from VS/VU privilege level, the check fails, and returns RISCV_EXCP_VIRT_INSTRUCTION_FAULT 4) If accessing from U privilege level, the check fails, and returns RISCV_EXCP_ILLEGAL_INST Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-Id: <20220718130955.11899-7-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/timer/ibex_timer.c')
0 files changed, 0 insertions, 0 deletions