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| author | Michael Davidsaver <mdavidsaver@gmail.com> | 2017-02-28 12:08:18 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 12:08:18 +0000 |
| commit | 14790f730a9b7da026f5562505d1004f67abebf5 (patch) | |
| tree | 5ddd2e418ed13befb7572856e229ef64136132d1 /hw/timer/imx_gpt.c | |
| parent | a25dc805e2e63a55029e787a52335e12dabf07dc (diff) | |
| download | focaccia-qemu-14790f730a9b7da026f5562505d1004f67abebf5.tar.gz focaccia-qemu-14790f730a9b7da026f5562505d1004f67abebf5.zip | |
armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
The VECTCLRACTIVE and VECTRESET bits in the AIRCR are both documented as UNPREDICTABLE if you write a 1 to them when the processor is not halted in Debug state (ie stopped and under the control of an external JTAG debugger). Since we don't implement Debug state or emulated JTAG these bits are always UNPREDICTABLE for us. Instead of logging them as unimplemented we can simply log writes as guest errors and ignore them. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> [PMM: change extracted from another patch; commit message constructed from scratch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Diffstat (limited to 'hw/timer/imx_gpt.c')
0 files changed, 0 insertions, 0 deletions