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authorWladimir J. van der Laan <laanwj@gmail.com>2019-06-27 02:34:54 -0700
committerPalmer Dabbelt <palmer@sifive.com>2019-06-27 02:47:04 -0700
commit2e3df911c5bb8199b72427a36ce68a8fe2decf1f (patch)
treea213f725b42b99b284d8a24924d37eed8866f6c5 /hw/timer/lm32_timer.c
parentf88222dae552c202685f5bee43e6c2e12d3c088c (diff)
downloadfocaccia-qemu-2e3df911c5bb8199b72427a36ce68a8fe2decf1f.tar.gz
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disas/riscv: Fix `rdinstreth` constraint
The constraint for `rdinstreth` was comparing the csr number to 0xc80,
which is `cycleh` instead. Fix this.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/timer/lm32_timer.c')
0 files changed, 0 insertions, 0 deletions