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authorDavid Gibson <david@gibson.dropbear.id.au>2019-09-24 11:12:19 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2019-10-04 19:08:22 +1000
commit9f53c0db19605f76324fb09af23d30e181a06211 (patch)
tree3301492d4964d74bec04bc98ed7e86fd54059ce2 /hw/timer/lm32_timer.c
parentfe9b61b2468a6de170ae0e9afe92fa1daa7ab48b (diff)
downloadfocaccia-qemu-9f53c0db19605f76324fb09af23d30e181a06211.tar.gz
focaccia-qemu-9f53c0db19605f76324fb09af23d30e181a06211.zip
spapr: Fix indexing of XICS irqs
spapr global irq numbers are different from the source numbers on the ICS
when using XICS - they're offset by XICS_IRQ_BASE (0x1000).  But
spapr_irq_set_irq_xics() was passing through the global irq number to
the ICS code unmodified.

We only got away with this because of a counteracting bug - we were
incorrectly adjusting the qemu_irq we returned for a requested global irq
number.

That approach mostly worked but is very confusing, incorrectly relies on
the way the qemu_irq array is allocated, and undermines the intention of
having the global array of qemu_irqs for spapr have a consistent meaning
regardless of irq backend.

So, fix both set_irq and qemu_irq indexing.  We rename some parameters at
the same time to make it clear that they are referring to spapr global
irq numbers.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'hw/timer/lm32_timer.c')
0 files changed, 0 insertions, 0 deletions