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authorPeter Maydell <peter.maydell@linaro.org>2014-02-25 11:54:40 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-02-25 11:54:40 +0000
commit05fd3bf2a1c9fc26414d3cf608732c40d0d9eb23 (patch)
tree89e1d86090aca653216eef7ca1503797fb0a0931 /hw/timer/slavio_timer.c
parente7a1d6c52a3ac6e76e5653c830b2545e0a4043d3 (diff)
parent604e1f9cd0602e92ba49a27dd3a46db3d29f882e (diff)
downloadfocaccia-qemu-05fd3bf2a1c9fc26414d3cf608732c40d0d9eb23.tar.gz
focaccia-qemu-05fd3bf2a1c9fc26414d3cf608732c40d0d9eb23.zip
Merge remote-tracking branch 'remotes/xtensa/tags/20140224-xtensa' into staging
Xtensa fixes and improvements queue 2014-02-24:
- add support for ML605 and KC705 FPGA boards;
- flush opencores_eth queue when new RX descriptor is available;
- add basic checks to cache opcodes;
- make core configuration available to tests;
- implement HW config ID special registers.

# gpg: Signature made Mon 24 Feb 2014 00:52:42 GMT using RSA key ID F83FA044
# gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"

* remotes/xtensa/tags/20140224-xtensa:
  target-xtensa: provide HW confg ID registers
  target-xtensa: refactor standard core configuration
  target-xtensa: add basic tests for cache opcodes
  target-xtensa: allow using core configuration in tests
  target-xtensa: add overridable test_init macro
  target-xtensa: add basic checks to icache opcodes
  target-xtensa: add basic checks to dcache opcodes
  target-xtensa: add RRRI4 opcode format fields
  opencores_eth: flush queue whenever can_receive can go from false to true
  hw/xtensa: add support for ML605 and KC705 FPGA board

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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