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| author | Francisco Iglesias <francisco.iglesias@xilinx.com> | 2022-02-03 15:17:42 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-02-08 10:56:27 +0000 |
| commit | c74ccb5dd6955736907256aab8229f63385a5e2e (patch) | |
| tree | 525b1a7aa3cf558399a4ec71345a016da9bdccb0 /hw/timer/stm32f2xx_timer.c | |
| parent | a7b66ada6e88aa9a9f420f1116569b2df47fa1ab (diff) | |
| download | focaccia-qemu-c74ccb5dd6955736907256aab8229f63385a5e2e.tar.gz focaccia-qemu-c74ccb5dd6955736907256aab8229f63385a5e2e.zip | |
hw/arm/xlnx-zynqmp: 'Or' the QSPI / QSPI DMA IRQs
'Or' the IRQs coming from the QSPI and QSPI DMA models. This is done for avoiding the situation where one of the models incorrectly deasserts an interrupt asserted from the other model (which will result in that the IRQ is lost and will not reach guest SW). Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20220203151742.1457-1-francisco.iglesias@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer/stm32f2xx_timer.c')
0 files changed, 0 insertions, 0 deletions