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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-10-23 11:00:44 -0400 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-24 17:16:28 +0100 |
| commit | 0a54d68e212a17ae347f40488acef69e63b7bbb4 (patch) | |
| tree | 94cdfae6910bc5ba6cefc3f8a5332c752dc3aa2f /hw/timer/xilinx_timer.c | |
| parent | 60e12c3776a03a0535fcd4f4ea3eba8f60c0ab6e (diff) | |
| download | focaccia-qemu-0a54d68e212a17ae347f40488acef69e63b7bbb4.tar.gz focaccia-qemu-0a54d68e212a17ae347f40488acef69e63b7bbb4.zip | |
target/arm: Hoist computation of TBFLAG_A32.VFPEN
There are 3 conditions that each enable this flag. M-profile always enables; A-profile with EL1 as AA64 always enables. Both of these conditions can easily be cached. The final condition relies on the FPEXC register which we are not prepared to cache. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191023150057.25731-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer/xilinx_timer.c')
0 files changed, 0 insertions, 0 deletions