diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-12-14 16:03:33 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-12-14 16:03:33 +0000 |
| commit | 110b1a8c7c2b70487a77419e0426a8be4a6269cc (patch) | |
| tree | c1380ddcfb0920edd17864509ca84fb61e25311d /hw/timer | |
| parent | 0f98c9945899c5dfacd5a410ff04178eda605a16 (diff) | |
| parent | 2d7137c10fafefe40a0a049ff8a7bd78b66e661f (diff) | |
| download | focaccia-qemu-110b1a8c7c2b70487a77419e0426a8be4a6269cc.tar.gz focaccia-qemu-110b1a8c7c2b70487a77419e0426a8be4a6269cc.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20181213' into staging
target-arm queue: * Convert various devices from sysbus init to instance_init * Remove the now unused sysbus init support entirely * Allow AArch64 processors to boot from a kernel placed over 4GB * hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link() * versal: minor fixes to virtio-mmio instantation * arm: Implement the ARMv8.1-HPD extension * arm: Implement the ARMv8.2-AA32HPD extension * arm: Implement the ARMv8.1-LOR extension (as the trivial "no limited ordering regions provided" minimum) # gpg: Signature made Thu 13 Dec 2018 14:52:25 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20181213: (37 commits) target/arm: Implement the ARMv8.1-LOR extension target/arm: Use arm_hcr_el2_eff more places target/arm: Introduce arm_hcr_el2_eff target/arm: Implement the ARMv8.2-AA32HPD extension target/arm: Implement the ARMv8.1-HPD extension target/arm: Tidy scr_write target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el target/arm: Add SCR_EL3 bits up to ARMv8.5 target/arm: Add HCR_EL2 bits up to ARMv8.5 target/arm: Move id_aa64mmfr* to ARMISARegisters hw/arm: versal: Correct the nr of IRQs to 192 hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio hw/arm: versal: Reduce number of virtio-mmio instances hw/arm: versal: Remove bogus virtio-mmio creation core/sysbus: remove the SysBusDeviceClass::init path xen_backend: remove xen_sysdev_init() function usb/tusb6010: Convert sysbus init function to realize function timer/puv3_ost: Convert sysbus init function to realize function timer/grlib_gptimer: Convert sysbus init function to realize function timer/etraxfs_timer: Convert sysbus init function to realize function ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer')
| -rw-r--r-- | hw/timer/etraxfs_timer.c | 14 | ||||
| -rw-r--r-- | hw/timer/grlib_gptimer.c | 11 | ||||
| -rw-r--r-- | hw/timer/puv3_ost.c | 13 |
3 files changed, 18 insertions, 20 deletions
diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index d13bc30b2d..2280914b1d 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -315,9 +315,10 @@ static void etraxfs_timer_reset(void *opaque) qemu_irq_lower(t->irq); } -static int etraxfs_timer_init(SysBusDevice *dev) +static void etraxfs_timer_realize(DeviceState *dev, Error **errp) { ETRAXTimerState *t = ETRAX_TIMER(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); t->bh_t0 = qemu_bh_new(timer0_hit, t); t->bh_t1 = qemu_bh_new(timer1_hit, t); @@ -326,21 +327,20 @@ static int etraxfs_timer_init(SysBusDevice *dev) t->ptimer_t1 = ptimer_init(t->bh_t1, PTIMER_POLICY_DEFAULT); t->ptimer_wd = ptimer_init(t->bh_wd, PTIMER_POLICY_DEFAULT); - sysbus_init_irq(dev, &t->irq); - sysbus_init_irq(dev, &t->nmi); + sysbus_init_irq(sbd, &t->irq); + sysbus_init_irq(sbd, &t->nmi); memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, "etraxfs-timer", 0x5c); - sysbus_init_mmio(dev, &t->mmio); + sysbus_init_mmio(sbd, &t->mmio); qemu_register_reset(etraxfs_timer_reset, t); - return 0; } static void etraxfs_timer_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - sdc->init = etraxfs_timer_init; + dc->realize = etraxfs_timer_realize; } static const TypeInfo etraxfs_timer_info = { diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 4ed96e970a..183eddc073 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -347,10 +347,11 @@ static void grlib_gptimer_reset(DeviceState *d) } } -static int grlib_gptimer_init(SysBusDevice *dev) +static void grlib_gptimer_realize(DeviceState *dev, Error **errp) { GPTimerUnit *unit = GRLIB_GPTIMER(dev); unsigned int i; + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); assert(unit->nr_timers > 0); assert(unit->nr_timers <= GPTIMER_MAX_TIMERS); @@ -366,7 +367,7 @@ static int grlib_gptimer_init(SysBusDevice *dev) timer->id = i; /* One IRQ line for each timer */ - sysbus_init_irq(dev, &timer->irq); + sysbus_init_irq(sbd, &timer->irq); ptimer_set_freq(timer->ptimer, unit->freq_hz); } @@ -375,8 +376,7 @@ static int grlib_gptimer_init(SysBusDevice *dev) unit, "gptimer", UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers); - sysbus_init_mmio(dev, &unit->iomem); - return 0; + sysbus_init_mmio(sbd, &unit->iomem); } static Property grlib_gptimer_properties[] = { @@ -389,9 +389,8 @@ static Property grlib_gptimer_properties[] = { static void grlib_gptimer_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = grlib_gptimer_init; + dc->realize = grlib_gptimer_realize; dc->reset = grlib_gptimer_reset; dc->props = grlib_gptimer_properties; } diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index 0b3d717e60..3be58c7fdd 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -113,16 +113,17 @@ static void puv3_ost_tick(void *opaque) } } -static int puv3_ost_init(SysBusDevice *dev) +static void puv3_ost_realize(DeviceState *dev, Error **errp) { PUV3OSTState *s = PUV3_OST(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); s->reg_OIER = 0; s->reg_OSSR = 0; s->reg_OSMR0 = 0; s->reg_OSCR = 0; - sysbus_init_irq(dev, &s->irq); + sysbus_init_irq(sbd, &s->irq); s->bh = qemu_bh_new(puv3_ost_tick, s); s->ptimer = ptimer_init(s->bh, PTIMER_POLICY_DEFAULT); @@ -130,16 +131,14 @@ static int puv3_ost_init(SysBusDevice *dev) memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost", PUV3_REGS_OFFSET); - sysbus_init_mmio(dev, &s->iomem); - - return 0; + sysbus_init_mmio(sbd, &s->iomem); } static void puv3_ost_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - sdc->init = puv3_ost_init; + dc->realize = puv3_ost_realize; } static const TypeInfo puv3_ost_info = { |