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| author | Stefan Berger <stefanb@linux.vnet.ibm.com> | 2018-03-02 20:18:41 -0500 |
|---|---|---|
| committer | Stefan Berger <stefanb@linux.vnet.ibm.com> | 2018-03-06 13:00:41 -0500 |
| commit | ec427498da5a1a0d2d2e807a2681a3d1c5a93b02 (patch) | |
| tree | f80f3d1939a0ca911c05b8d49f1eb243db003e74 /hw/tpm/tpm_crb.c | |
| parent | 8cb340c613ee3e626b070e0429c589f8a60ac657 (diff) | |
| download | focaccia-qemu-ec427498da5a1a0d2d2e807a2681a3d1c5a93b02.tar.gz focaccia-qemu-ec427498da5a1a0d2d2e807a2681a3d1c5a93b02.zip | |
tpm: convert tpm_crb.c to use trace-events
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/tpm/tpm_crb.c')
| -rw-r--r-- | hw/tpm/tpm_crb.c | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index b5b8256360..d8917cb101 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -29,6 +29,7 @@ #include "sysemu/reset.h" #include "tpm_int.h" #include "tpm_util.h" +#include "trace.h" typedef struct CRBState { DeviceState parent_obj; @@ -44,14 +45,6 @@ typedef struct CRBState { #define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) -#define DEBUG_CRB 0 - -#define DPRINTF(fmt, ...) do { \ - if (DEBUG_CRB) { \ - printf(fmt, ## __VA_ARGS__); \ - } \ - } while (0) - #define CRB_INTF_TYPE_CRB_ACTIVE 0b1 #define CRB_INTF_VERSION_CRB 0b1 #define CRB_INTF_CAP_LOCALITY_0_ONLY 0b0 @@ -91,8 +84,8 @@ static uint64_t tpm_crb_mmio_read(void *opaque, hwaddr addr, unsigned offset = addr & 3; uint32_t val = *(uint32_t *)regs >> (8 * offset); - DPRINTF("CRB read 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 "\n", - addr, size, val); + trace_tpm_crb_mmio_read(addr, size, val); + return val; } @@ -100,8 +93,8 @@ static void tpm_crb_mmio_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { CRBState *s = CRB(opaque); - DPRINTF("CRB write 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx64 "\n", - addr, size, val); + + trace_tpm_crb_mmio_write(addr, size, val); switch (addr) { case A_CRB_CTRL_REQ: |