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authorPeter Maydell <peter.maydell@linaro.org>2020-09-28 19:31:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-28 19:31:50 +0100
commit1553d543ff4b9f91de4ed7743f0cd6e534528b9e (patch)
treec891939f2fcbcb7dfc11d37fe434a2955d084dc0 /hw/usb/hcd-xhci-nec.c
parent74504514b154ebebdff577d88e4bf5c13074e9ed (diff)
parent5c43b603a2e3f77f41e0cf339e72bee2077bfe61 (diff)
downloadfocaccia-qemu-1553d543ff4b9f91de4ed7743f0cd6e534528b9e.tar.gz
focaccia-qemu-1553d543ff4b9f91de4ed7743f0cd6e534528b9e.zip
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200928-pull-request' into staging
usb: xhci sysbus support.
usb: use lock guards.

# gpg: Signature made Mon 28 Sep 2020 14:16:22 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/usb-20200928-pull-request:
  hw/usb: Use lock guard macros
  usb: hcd-xhci-sysbus: Attach xhci to sysbus device
  usb/hcd-xhci: Split pci wrapper for xhci base model
  usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c
  usb/hcd-xhci: Make dma read/writes hooks pci free

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/usb/hcd-xhci-nec.c')
-rw-r--r--hw/usb/hcd-xhci-nec.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c
index e6a5a22b6d..2efa6fa0f8 100644
--- a/hw/usb/hcd-xhci-nec.c
+++ b/hw/usb/hcd-xhci-nec.c
@@ -25,17 +25,17 @@
 #include "hw/pci/pci.h"
 #include "hw/qdev-properties.h"
 
-#include "hcd-xhci.h"
+#include "hcd-xhci-pci.h"
 
 static Property nec_xhci_properties[] = {
-    DEFINE_PROP_ON_OFF_AUTO("msi", XHCIState, msi, ON_OFF_AUTO_AUTO),
-    DEFINE_PROP_ON_OFF_AUTO("msix", XHCIState, msix, ON_OFF_AUTO_AUTO),
-    DEFINE_PROP_BIT("superspeed-ports-first",
-                    XHCIState, flags, XHCI_FLAG_SS_FIRST, true),
-    DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags,
+    DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO),
+    DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO),
+    DEFINE_PROP_BIT("superspeed-ports-first", XHCIPciState,
+                    xhci.flags, XHCI_FLAG_SS_FIRST, true),
+    DEFINE_PROP_BIT("force-pcie-endcap", XHCIPciState, xhci.flags,
                     XHCI_FLAG_FORCE_PCIE_ENDCAP, false),
-    DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS),
-    DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS),
+    DEFINE_PROP_UINT32("intrs", XHCIPciState, xhci.numintrs, MAXINTRS),
+    DEFINE_PROP_UINT32("slots", XHCIPciState, xhci.numslots, MAXSLOTS),
     DEFINE_PROP_END_OF_LIST(),
 };
 
@@ -52,7 +52,7 @@ static void nec_xhci_class_init(ObjectClass *klass, void *data)
 
 static const TypeInfo nec_xhci_info = {
     .name          = TYPE_NEC_XHCI,
-    .parent        = TYPE_XHCI,
+    .parent        = TYPE_XHCI_PCI,
     .class_init    = nec_xhci_class_init,
 };