summary refs log tree commit diff stats
path: root/hw/vfio/pci.h
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2020-02-07 11:52:15 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-02-07 11:52:15 +0000
commit346ed3151f1c43e72c40cb55b392a1d4cface62c (patch)
tree5507399ff6326aa49c0b28b3d3ae70abab5a253c /hw/vfio/pci.h
parent5b7686f3fa2092d2b3be92df67b5966ee1b0142a (diff)
parent29d62771c81d8fd244a67c14a1d968c268d3fb19 (diff)
downloadfocaccia-qemu-346ed3151f1c43e72c40cb55b392a1d4cface62c.tar.gz
focaccia-qemu-346ed3151f1c43e72c40cb55b392a1d4cface62c.zip
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20200206.0' into staging
VFIO update 2020-02-06

 - Split IGD to separate file and config option (Thomas Huth)

# gpg: Signature made Thu 06 Feb 2020 23:50:49 GMT
# gpg:                using RSA key 239B9B6E3BB08B22
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex@shazbot.org>" [full]
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>" [full]
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22

* remotes/awilliam/tags/vfio-update-20200206.0:
  hw/vfio: Move the IGD quirk code to a separate file

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/vfio/pci.h')
-rw-r--r--hw/vfio/pci.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
index 35626cd63e..0da7a20a7e 100644
--- a/hw/vfio/pci.h
+++ b/hw/vfio/pci.h
@@ -172,6 +172,21 @@ typedef struct VFIOPCIDevice {
     Notifier irqchip_change_notifier;
 } VFIOPCIDevice;
 
+/* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */
+static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device)
+{
+    return (vendor == PCI_ANY_ID || vendor == vdev->vendor_id) &&
+           (device == PCI_ANY_ID || device == vdev->device_id);
+}
+
+static inline bool vfio_is_vga(VFIOPCIDevice *vdev)
+{
+    PCIDevice *pdev = &vdev->pdev;
+    uint16_t class = pci_get_word(pdev->config + PCI_CLASS_DEVICE);
+
+    return class == PCI_CLASS_DISPLAY_VGA;
+}
+
 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
 void vfio_pci_write_config(PCIDevice *pdev,
                            uint32_t addr, uint32_t val, int len);
@@ -189,6 +204,8 @@ void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr);
 void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev);
 int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
 void vfio_quirk_reset(VFIOPCIDevice *vdev);
+VFIOQuirk *vfio_quirk_alloc(int nr_mem);
+void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr);
 
 extern const PropertyInfo qdev_prop_nv_gpudirect_clique;