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| author | Paolo Bonzini <pbonzini@redhat.com> | 2022-09-15 02:14:31 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-11-15 09:34:42 +1000 |
| commit | 35d95e4126d83c0bb0de83007494d184f6111b3d (patch) | |
| tree | a9e0f2681a61876654f79156aef293abd06ab7a5 /hw/virtio/vhost-user-gpio.c | |
| parent | d1bb978ba1654ddc6e927621b554eebb216fb9dd (diff) | |
| download | focaccia-qemu-35d95e4126d83c0bb0de83007494d184f6111b3d.tar.gz focaccia-qemu-35d95e4126d83c0bb0de83007494d184f6111b3d.zip | |
target/i386: hardcode R_EAX as destination register for LAHF/SAHF
When translating code that is using LAHF and SAHF in combination with the REX prefix, the instructions should not use any other register than AH; however, QEMU selects SPL (SP being register 4, just like AH) if the REX prefix is present. To fix this, use deposit directly without going through gen_op_mov_v_reg and gen_op_mov_reg_v. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/130 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/virtio/vhost-user-gpio.c')
0 files changed, 0 insertions, 0 deletions