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| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-02-21 09:38:27 -0600 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-02-21 09:38:27 -0600 |
| commit | 259dc0c1ce8eef14e5e0c349bc68ba05c9d5d82f (patch) | |
| tree | 017cba36bb8b71b7b2207300403d13f37d0edf8f /hw | |
| parent | cc2832a51c8ce43349967ab1b6c7aafd510e55b2 (diff) | |
| parent | 159c9836d057d8990e71399e8a431b2b911e2885 (diff) | |
| download | focaccia-qemu-259dc0c1ce8eef14e5e0c349bc68ba05c9d5d82f.tar.gz focaccia-qemu-259dc0c1ce8eef14e5e0c349bc68ba05c9d5d82f.zip | |
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
# By Alin Tomescu (1) and others # Via Stefan Hajnoczi * stefanha/trivial-patches: .gitignore: Ignore optionrom/*.asm ppc: fix bamboo >256MB RAM initialization in hw/ppc4xx_devs.c Add some missing qtest binaries to .gitignore xilinx_axienet.c: Assert no error when making link Remove forward declaration of non-existant variable
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ppc4xx_devs.c | 2 | ||||
| -rw-r--r-- | hw/xilinx_axienet.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c index 5e491bc0b4..b6bb0e166a 100644 --- a/hw/ppc4xx_devs.c +++ b/hw/ppc4xx_devs.c @@ -700,7 +700,7 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, vmstate_register_ram_global(&ram_memories[i]); ram_bases[i] = base; ram_sizes[i] = bank_size; - base += ram_size; + base += bank_size; size_left -= bank_size; break; } diff --git a/hw/xilinx_axienet.c b/hw/xilinx_axienet.c index 34e344ce2c..e5d9251b8b 100644 --- a/hw/xilinx_axienet.c +++ b/hw/xilinx_axienet.c @@ -869,9 +869,11 @@ static int xilinx_enet_init(SysBusDevice *dev) static void xilinx_enet_initfn(Object *obj) { struct XilinxAXIEnet *s = FROM_SYSBUS(typeof(*s), SYS_BUS_DEVICE(obj)); + Error *errp = NULL; object_property_add_link(obj, "axistream-connected", TYPE_STREAM_SLAVE, - (Object **) &s->tx_dev, NULL); + (Object **) &s->tx_dev, &errp); + assert_no_error(errp); } static Property xilinx_enet_properties[] = { |