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authorMarcel Apfelbaum <marcel@redhat.com>2017-02-20 22:43:10 +0200
committerMichael S. Tsirkin <mst@redhat.com>2017-03-16 01:46:40 +0200
commitf03d8ea330d69f3a98093dfa2633635dff355f90 (patch)
tree5e2986d8b931713ceac9c0f297fde943c427a459 /hw
parent1883ff34b540daacae948f493b0ba525edf5f642 (diff)
downloadfocaccia-qemu-f03d8ea330d69f3a98093dfa2633635dff355f90.tar.gz
focaccia-qemu-f03d8ea330d69f3a98093dfa2633635dff355f90.zip
hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities
Absence of any Extended Capabilities is required to be
indicated by an Extended Capability header with a Capability ID of
0000h, a Capability Version of 0h, and a Next Capability Offset of 000h.

Instead of inserting a 'NULL' capability is simpler to mark the start
of the Extended Configuration Space as read-only to achieve the same
behaviour.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/pci/pci.c2
-rw-r--r--hw/pci/pcie.c6
2 files changed, 8 insertions, 0 deletions
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index ad46390ec5..e6b08e1988 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -64,6 +64,8 @@ static Property pci_props[] = {
                     QEMU_PCI_CAP_SERR_BITNR, true),
     DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
                     QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
+    DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present,
+                    QEMU_PCIE_EXTCAP_INIT_BITNR, true),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index fc54bfd53d..82a890234f 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -109,6 +109,12 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
                  PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
 
     pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
+
+    if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) {
+        /* read-only to behave like a 'NULL' Extended Capability Header */
+        pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
+    }
+
     return pos;
 }