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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-03-25 20:22:14 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-23 15:04:56 -0700 |
| commit | 24b5e0fdb543a09c26d6d77051b17055288bef8e (patch) | |
| tree | 6156074daa4d56093009dd11d2d0e317c5b70081 /include/exec | |
| parent | f05d251906a335465a5c5b3a6ffcdce96eca54f4 (diff) | |
| download | focaccia-qemu-24b5e0fdb543a09c26d6d77051b17055288bef8e.tar.gz focaccia-qemu-24b5e0fdb543a09c26d6d77051b17055288bef8e.zip | |
include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags
Recover two bits from the inline flags. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec')
| -rw-r--r-- | include/exec/tlb-flags.h | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/include/exec/tlb-flags.h b/include/exec/tlb-flags.h index a0e51a4b37..54a6bae768 100644 --- a/include/exec/tlb-flags.h +++ b/include/exec/tlb-flags.h @@ -53,20 +53,15 @@ * contain the page physical address. */ #define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2)) -/* Set if TLB entry is an IO callback. */ -#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3)) -/* Set if TLB entry writes ignored. */ -#define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4)) /* Set if the slow path must be used; more flags in CPUTLBEntryFull. */ -#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5)) +#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 3)) /* * Use this mask to check interception with an alignment mask * in a TCG backend. */ #define TLB_FLAGS_MASK \ - (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \ - | TLB_FORCE_SLOW | TLB_DISCARD_WRITE) + (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_FORCE_SLOW) /* * Flags stored in CPUTLBEntryFull.slow_flags[x]. @@ -78,8 +73,14 @@ #define TLB_WATCHPOINT (1 << 1) /* Set if TLB entry requires aligned accesses. */ #define TLB_CHECK_ALIGNED (1 << 2) +/* Set if TLB entry writes ignored. */ +#define TLB_DISCARD_WRITE (1 << 3) +/* Set if TLB entry is an IO callback. */ +#define TLB_MMIO (1 << 4) -#define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED) +#define TLB_SLOW_FLAGS_MASK \ + (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED | \ + TLB_DISCARD_WRITE | TLB_MMIO) /* The two sets of flags must not overlap. */ QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); |