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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-06-05 18:03:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-06-05 18:03:43 +0100 |
| commit | a0d4aac7467dd02e5657b79e867f067330266a24 (patch) | |
| tree | dafa5ae8bfd6aa13c76af9675c9ae2b8506b05d7 /include/exec | |
| parent | 199e19ee538eb61fd08b1c1ee5aa838ebdcc968e (diff) | |
| parent | 2d826cdc8a43ba1817a44f481f8dc8f08668b0a6 (diff) | |
| download | focaccia-qemu-a0d4aac7467dd02e5657b79e867f067330266a24.tar.gz focaccia-qemu-a0d4aac7467dd02e5657b79e867f067330266a24.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170605' into staging
Queued TCG patches # gpg: Signature made Mon 05 Jun 2017 17:48:42 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170605: (26 commits) target/alpha: Use goto_tb for fallthru between TBs target/alpha: Implement WTINT inline target/mips: optimize indirect branches target/mips: optimize cross-page direct jumps in softmmu target/aarch64: optimize indirect branches target/aarch64: optimize cross-page direct jumps in softmmu target/hppa: Use tcg_gen_lookup_and_goto_ptr target/s390: Use tcg_gen_lookup_and_goto_ptr tcg/mips: implement goto_ptr tcg/arm: Implement goto_ptr tcg/arm: Clarify tcg_out_bx for arm4 host tcg/s390: Implement goto_ptr tcg/sparc: Implement goto_ptr tcg/aarch64: Implement goto_ptr tcg/ppc: Implement goto_ptr tb-hash: improve tb_jmp_cache hash function in user mode target/i386: optimize indirect branches target/i386: optimize cross-page direct jumps in softmmu target/i386: introduce gen_jr helper to generate lookup_and_goto_ptr target/arm: optimize indirect branches ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
| -rw-r--r-- | include/exec/exec-all.h | 2 | ||||
| -rw-r--r-- | include/exec/tb-hash.h | 12 |
2 files changed, 14 insertions, 0 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index bcde1e6a14..87ae10bcc9 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -368,6 +368,8 @@ struct TranslationBlock { void tb_free(TranslationBlock *tb); void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); +TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, + target_ulong cs_base, uint32_t flags); #if defined(USE_DIRECT_JUMP) diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h index 2c27490cb8..b1fe2d0161 100644 --- a/include/exec/tb-hash.h +++ b/include/exec/tb-hash.h @@ -22,6 +22,8 @@ #include "exec/tb-hash-xx.h" +#ifdef CONFIG_SOFTMMU + /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for addresses on the same page. The top bits are the same. This allows TLB invalidation to quickly clear a subset of the hash table. */ @@ -45,6 +47,16 @@ static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) | (tmp & TB_JMP_ADDR_MASK)); } +#else + +/* In user-mode we can get better hashing because we do not have a TLB */ +static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc) +{ + return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1); +} + +#endif /* CONFIG_SOFTMMU */ + static inline uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags) { |