summary refs log tree commit diff stats
path: root/include/hw/arm/armsse.h
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:42 +0000
commitd847ca5128351ea3be3a92be74d7bac74e59f048 (patch)
treed82a8b4ee8624268a2e65f8c83f1210ab7ab6b0e /include/hw/arm/armsse.h
parent91c1e9fcbd7548db3687db946a778b8f34d1343c (diff)
downloadfocaccia-qemu-d847ca5128351ea3be3a92be74d7bac74e59f048.tar.gz
focaccia-qemu-d847ca5128351ea3be3a92be74d7bac74e59f048.zip
hw/arm/armsse: Give each CPU its own view of memory
Give each CPU its own container memory region. This is necessary
for two reasons:
 * some devices are instantiated one per CPU and the CPU sees only
   its own device
 * since a memory region can only be put into one container, we must
   give each armv7m object a different MemoryRegion as its 'memory'
   property, or a dual-CPU configuration will assert on realize when
   the second armv7m object tries to put the MR into a container when
   it is already in the first armv7m object's container

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-13-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/arm/armsse.h')
-rw-r--r--include/hw/arm/armsse.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index faf5dfed25..89f19a971f 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -135,7 +135,17 @@ typedef struct ARMSSE {
     IoTKitSysCtl sysctl;
     IoTKitSysCtl sysinfo;
 
+    /*
+     * 'container' holds all devices seen by all CPUs.
+     * 'cpu_container[i]' is the view that CPU i has: this has the
+     * per-CPU devices of that CPU, plus as the background 'container'
+     * (or an alias of it, since we can only use it directly once).
+     * container_alias[i] is the alias of 'container' used by CPU i+1;
+     * CPU 0 can use 'container' directly.
+     */
     MemoryRegion container;
+    MemoryRegion container_alias[SSE_MAX_CPUS - 1];
+    MemoryRegion cpu_container[SSE_MAX_CPUS];
     MemoryRegion alias1;
     MemoryRegion alias2;
     MemoryRegion alias3;