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authorMichael Tokarev <mjt@tls.msk.ru>2023-07-14 14:14:49 +0300
committerMichael Tokarev <mjt@tls.msk.ru>2023-07-25 17:13:53 +0300
commit673d8215415dc0c13e96b8d757102d942916d1b2 (patch)
treece6ec6398c83f100750e826d9b4bee7d9e4f9353 /include/hw/arm/fsl-imx7.h
parentcced0d653973f6ad0d9e8bdbd365e12d0f2316f9 (diff)
downloadfocaccia-qemu-673d8215415dc0c13e96b8d757102d942916d1b2.tar.gz
focaccia-qemu-673d8215415dc0c13e96b8d757102d942916d1b2.zip
arm: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/fsl-imx7.h')
-rw-r--r--include/hw/arm/fsl-imx7.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index 54ea2f0890..fcce6421c8 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -165,7 +165,7 @@ enum FslIMX7MemoryMap {
      * Some versions of the reference manual claim that UART2 is @
      * 0x30870000, but experiments with HW + DT files in upstream
      * Linux kernel show that not to be true and that block is
-     * acutally located @ 0x30890000
+     * actually located @ 0x30890000
      */
     FSL_IMX7_UART2_ADDR           = 0x30890000,
     FSL_IMX7_UART3_ADDR           = 0x30880000,