diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2019-09-26 19:34:13 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-10-15 18:09:05 +0100 |
| commit | 00cbd5bd74b1d9db3f39c45aea8eebeedb641051 (patch) | |
| tree | f9d426beb5f98f4841a45e3d83dd81de42ecdf3b /include/hw/arm/raspi_platform.h | |
| parent | 5cd436f95066be3eb87e8767fb1a95ebdd4a9dc8 (diff) | |
| download | focaccia-qemu-00cbd5bd74b1d9db3f39c45aea8eebeedb641051.tar.gz focaccia-qemu-00cbd5bd74b1d9db3f39c45aea8eebeedb641051.zip | |
hw/arm/bcm2835: Add various unimplemented peripherals
Base addresses and sizes taken from the "BCM2835 ARM Peripherals" datasheet from February 06 2012: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190926173428.10713-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/raspi_platform.h')
| -rw-r--r-- | include/hw/arm/raspi_platform.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index 66969fac5d..cdcbca943f 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -38,6 +38,8 @@ * Doorbells & Mailboxes */ #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */ #define CM_OFFSET 0x101000 /* Clock Management */ +#define A2W_OFFSET 0x102000 /* Reset controller */ +#define AVS_OFFSET 0x103000 /* Audio Video Standard */ #define RNG_OFFSET 0x104000 #define GPIO_OFFSET 0x200000 #define UART0_OFFSET 0x201000 @@ -45,11 +47,17 @@ #define I2S_OFFSET 0x203000 #define SPI0_OFFSET 0x204000 #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ +#define OTP_OFFSET 0x20f000 +#define BSC_SL_OFFSET 0x214000 /* SPI slave */ #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ #define EMMC1_OFFSET 0x300000 #define SMI_OFFSET 0x600000 #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */ +#define DBUS_OFFSET 0x900000 +#define AVE0_OFFSET 0x910000 #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ +#define SDRAMC_OFFSET 0xe00000 #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */ /* GPU interrupts */ |