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authorLuc Michel <luc.michel@amd.com>2024-02-13 09:22:11 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-02-15 13:38:11 +0000
commit15f6c16e6e4b418a1dabad6704917bdb6ee883f4 (patch)
tree26f04b37b6b434248dea5105e99bbd0bb734572a /include/hw/arm/smmu-common.h
parentbfe30b02e7018ff0fa9fd8a7342ce5c4cb5ca40c (diff)
downloadfocaccia-qemu-15f6c16e6e4b418a1dabad6704917bdb6ee883f4.tar.gz
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hw/arm/smmuv3: add support for stage 1 access fault
An access fault is raised when the Access Flag is not set in the
looked-up PTE and the AFFD field is not set in the corresponding context
descriptor. This was already implemented for stage 2. Implement it for
stage 1 as well.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Mostafa Saleh <smostafa@google.com>
Message-id: 20240213082211.3330400-1-luc.michel@amd.com
[PMM: tweaked comment text]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/smmu-common.h')
-rw-r--r--include/hw/arm/smmu-common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index fd8d772da1..5ec2e6c1a4 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -92,6 +92,7 @@ typedef struct SMMUTransCfg {
     bool disabled;             /* smmu is disabled */
     bool bypassed;             /* translation is bypassed */
     bool aborted;              /* translation is aborted */
+    bool affd;                 /* AF fault disable */
     uint32_t iotlb_hits;       /* counts IOTLB hits */
     uint32_t iotlb_misses;     /* counts IOTLB misses*/
     /* Used by stage-1 only. */