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| author | Mostafa Saleh <smostafa@google.com> | 2024-07-15 08:45:12 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-07-18 13:49:29 +0100 |
| commit | 1ea8a6f59b8d6dbcc5d0aa59380ae45a18231b88 (patch) | |
| tree | d9f2fa31801fa1ef2a419643225e229ed103c909 /include/hw/arm/smmu-common.h | |
| parent | f42a0a57c0a22210456e83676f43e88782e43942 (diff) | |
| download | focaccia-qemu-1ea8a6f59b8d6dbcc5d0aa59380ae45a18231b88.tar.gz focaccia-qemu-1ea8a6f59b8d6dbcc5d0aa59380ae45a18231b88.zip | |
hw/arm/smmu: Support nesting in smmuv3_range_inval()
With nesting, we would need to invalidate IPAs without over-invalidating stage-1 IOVAs. This can be done by distinguishing IPAs in the TLBs by having ASID=-1. To achieve that, rework the invalidation for IPAs to have a separate function, while for IOVA invalidation ASID=-1 means invalidate for all ASIDs. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20240715084519.1189624-13-smostafa@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/smmu-common.h')
| -rw-r--r-- | include/hw/arm/smmu-common.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index a51005e8b8..da9ff45fb5 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -217,7 +217,8 @@ void smmu_iotlb_inv_asid(SMMUState *s, int asid); void smmu_iotlb_inv_vmid(SMMUState *s, int vmid); void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova, uint8_t tg, uint64_t num_pages, uint8_t ttl); - +void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg, + uint64_t num_pages, uint8_t ttl); /* Unmap the range of all the notifiers registered to any IOMMU mr */ void smmu_inv_notifiers_all(SMMUState *s); |