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authorMostafa Saleh <smostafa@google.com>2023-02-14 09:40:09 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-02-16 16:00:47 +0000
commitc2ecb424fb15ba0db0d9445721e6e8a8e79c4976 (patch)
treed94b50e4453d4828786b4b3e9fc4ea12c234616d /include/hw/arm/smmuv3.h
parentdbba45e6aa1048626faabff5f6bc2b341f87166f (diff)
downloadfocaccia-qemu-c2ecb424fb15ba0db0d9445721e6e8a8e79c4976.tar.gz
focaccia-qemu-c2ecb424fb15ba0db0d9445721e6e8a8e79c4976.zip
hw/arm/smmuv3: Add GBPA register
GBPA register can be used to globally abort all
transactions.

It is described in the SMMU manual in "6.3.14 SMMU_GBPA".
ABORT reset value is IMPLEMENTATION DEFINED, it is chosen to
be zero(Do not abort incoming transactions).

Other fields have default values of Use Incoming.

If UPDATE is not set, the write is ignored. This is the only permitted
behavior in SMMUv3.2 and later.(6.3.14.1 Update procedure)

As this patch adds a new state to the SMMU (GBPA), it is added
in a new subsection for forward migration compatibility.
GBPA is only migrated if its value is different from the reset value.
It does this to be backward migration compatible if SW didn't write
the register.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20230214094009.2445653-1-smostafa@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/smmuv3.h')
-rw-r--r--include/hw/arm/smmuv3.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index b6dd087526..a0c026402e 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -45,6 +45,7 @@ struct SMMUv3State {
     uint32_t cr[3];
     uint32_t cr0ack;
     uint32_t statusr;
+    uint32_t gbpa;
     uint32_t irq_ctrl;
     uint32_t gerror;
     uint32_t gerrorn;