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authorAlistair Francis <alistair23@gmail.com>2016-10-04 13:28:07 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-10-04 13:28:07 +0100
commit540a8f34b4f018570a0bbd86975d41dee0d9510c (patch)
tree1ffd255db9162a2cf1c3c39fabe255ce1286b824 /include/hw/arm/stm32f205_soc.h
parentb63041c8f6b1ad2332c6c8f458f26b34325613bf (diff)
downloadfocaccia-qemu-540a8f34b4f018570a0bbd86975d41dee0d9510c.tar.gz
focaccia-qemu-540a8f34b4f018570a0bbd86975d41dee0d9510c.zip
STM32F205: Connect the SPI devices
Connect the SPI devices to the STM32F205 SoC.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: d05849120420f8db0d9aa053bd23134c33cd9180.1474742262.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/stm32f205_soc.h')
-rw-r--r--include/hw/arm/stm32f205_soc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
index 1adf8246cd..133214195b 100644
--- a/include/hw/arm/stm32f205_soc.h
+++ b/include/hw/arm/stm32f205_soc.h
@@ -30,6 +30,7 @@
 #include "hw/char/stm32f2xx_usart.h"
 #include "hw/adc/stm32f2xx_adc.h"
 #include "hw/or-irq.h"
+#include "hw/ssi/stm32f2xx_spi.h"
 
 #define TYPE_STM32F205_SOC "stm32f205-soc"
 #define STM32F205_SOC(obj) \
@@ -38,6 +39,7 @@
 #define STM_NUM_USARTS 6
 #define STM_NUM_TIMERS 4
 #define STM_NUM_ADCS 3
+#define STM_NUM_SPIS 3
 
 #define FLASH_BASE_ADDRESS 0x08000000
 #define FLASH_SIZE (1024 * 1024)
@@ -56,6 +58,7 @@ typedef struct STM32F205State {
     STM32F2XXUsartState usart[STM_NUM_USARTS];
     STM32F2XXTimerState timer[STM_NUM_TIMERS];
     STM32F2XXADCState adc[STM_NUM_ADCS];
+    STM32F2XXSPIState spi[STM_NUM_SPIS];
 
     qemu_or_irq *adc_irqs;
 } STM32F205State;