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| author | Arnaud Minier <arnaud.minier@telecom-paris.fr> | 2024-03-03 15:06:41 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-03-05 13:22:56 +0000 |
| commit | 3b551477172801bbfb78bf8f58c512307785fd9e (patch) | |
| tree | 3ec5d62775b4809fd438d564c062c40da7e28ac6 /include/hw/arm/stm32l4x5_soc.h | |
| parent | 9c796d503f9d2ee2f6948964d972a7ef23b62033 (diff) | |
| download | focaccia-qemu-3b551477172801bbfb78bf8f58c512307785fd9e.tar.gz focaccia-qemu-3b551477172801bbfb78bf8f58c512307785fd9e.zip | |
hw/misc/stm32l4x5_rcc: Add write protections to CR register
Add write protections for the fields in the CR register. PLL configuration write protections (among others) have not been handled yet. This is planned in a future patch set. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240303140643.81957-7-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/stm32l4x5_soc.h')
0 files changed, 0 insertions, 0 deletions