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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-19 11:08:41 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-06-26 17:33:00 +0200 |
| commit | f6ff4923b92ceefbe5650c3e90ccdcc57dc60fb7 (patch) | |
| tree | deaf03b750a4e627c0de3530bcebe6ff61996136 /include/hw/core/cpu.h | |
| parent | 70bfde9a7de7fa3495d9e2bd7142cb1bc656484e (diff) | |
| download | focaccia-qemu-f6ff4923b92ceefbe5650c3e90ccdcc57dc60fb7.tar.gz focaccia-qemu-f6ff4923b92ceefbe5650c3e90ccdcc57dc60fb7.zip | |
target/microblaze: Define TCG_GUEST_DEFAULT_MO
The microblaze architecture does not reorder instructions.
While there is an MBAR wait-for-data-access instruction,
this concerns synchronizing with DMA.
This should have been defined when enabling MTTCG.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Fixes: d449561b130 ("configure: microblaze: Enable mttcg")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/core/cpu.h')
0 files changed, 0 insertions, 0 deletions