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authorBALATON Zoltan <balaton@eik.bme.hu>2018-06-19 10:52:15 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2018-06-21 21:22:53 +1000
commitef9173a5c086b5114343a86943f9b26a9c72d7d6 (patch)
tree345b7ca3c115f2a6caad566f2af04be1439cbb48 /include/hw/i2c/ppc4xx_i2c.h
parent39aeba6caa4b9de8b195fddddae5cc5835d19b04 (diff)
downloadfocaccia-qemu-ef9173a5c086b5114343a86943f9b26a9c72d7d6.tar.gz
focaccia-qemu-ef9173a5c086b5114343a86943f9b26a9c72d7d6.zip
ppc4xx_i2c: Implement directcntl register
As well as being able to generate its own i2c transactions, the ppc4xx
i2c controller has a DIRECTCNTL register which allows explicit control
of the i2c lines.

Using this register an OS can directly bitbang i2c operations. In
order to let emulated i2c devices respond to this, we need to wire up
the DIRECTCNTL register to qemu's bitbanged i2c handling code.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/i2c/ppc4xx_i2c.h')
-rw-r--r--include/hw/i2c/ppc4xx_i2c.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/hw/i2c/ppc4xx_i2c.h b/include/hw/i2c/ppc4xx_i2c.h
index e4b6ded855..ea6c8e1a58 100644
--- a/include/hw/i2c/ppc4xx_i2c.h
+++ b/include/hw/i2c/ppc4xx_i2c.h
@@ -31,6 +31,9 @@
 #include "hw/sysbus.h"
 #include "hw/i2c/i2c.h"
 
+/* from hw/i2c/bitbang_i2c.h */
+typedef struct bitbang_i2c_interface bitbang_i2c_interface;
+
 #define TYPE_PPC4xx_I2C "ppc4xx-i2c"
 #define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C)
 
@@ -42,6 +45,7 @@ typedef struct PPC4xxI2CState {
     I2CBus *bus;
     qemu_irq irq;
     MemoryRegion iomem;
+    bitbang_i2c_interface *bitbang;
     uint8_t mdata;
     uint8_t lmadr;
     uint8_t hmadr;