Move QOM typedefs and add missing includes

Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

7 files changed, 32 insertions, 18 deletions

diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h
index 5d96507ab6..ca54867964 100644
--- a/include/hw/i2c/arm_sbcon_i2c.h
+++ b/include/hw/i2c/arm_sbcon_i2c.h
@@ -14,14 +14,16 @@
 
 #include "hw/sysbus.h"
 #include "hw/i2c/bitbang_i2c.h"
+#include "qom/object.h"
 
 #define TYPE_VERSATILE_I2C "versatile_i2c"
 #define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
 
+typedef struct ArmSbconI2CState ArmSbconI2CState;
 #define ARM_SBCON_I2C(obj) \
     OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C)
 
-typedef struct ArmSbconI2CState {
+struct ArmSbconI2CState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -30,6 +32,6 @@ typedef struct ArmSbconI2CState {
     bitbang_i2c_interface bitbang;
     int out;
     int in;
-} ArmSbconI2CState;
+};
 
 #endif /* HW_I2C_ARM_SBCON_H */
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index 243789ae5d..2c0198e314 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -23,11 +23,14 @@
 
 #include "hw/i2c/i2c.h"
 #include "hw/sysbus.h"
+#include "qom/object.h"
 
 #define TYPE_ASPEED_I2C "aspeed.i2c"
 #define TYPE_ASPEED_2400_I2C TYPE_ASPEED_I2C "-ast2400"
 #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500"
 #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
+typedef struct AspeedI2CClass AspeedI2CClass;
+typedef struct AspeedI2CState AspeedI2CState;
 #define ASPEED_I2C(obj) \
     OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C)
 
@@ -56,7 +59,7 @@ typedef struct AspeedI2CBus {
     uint32_t dma_len;
 } AspeedI2CBus;
 
-typedef struct AspeedI2CState {
+struct AspeedI2CState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -70,14 +73,14 @@ typedef struct AspeedI2CState {
     AspeedI2CBus busses[ASPEED_I2C_NR_BUSSES];
     MemoryRegion *dram_mr;
     AddressSpace dram_as;
-} AspeedI2CState;
+};
 
 #define ASPEED_I2C_CLASS(klass) \
      OBJECT_CLASS_CHECK(AspeedI2CClass, (klass), TYPE_ASPEED_I2C)
 #define ASPEED_I2C_GET_CLASS(obj) \
      OBJECT_GET_CLASS(AspeedI2CClass, (obj), TYPE_ASPEED_I2C)
 
-typedef struct AspeedI2CClass {
+struct AspeedI2CClass {
     SysBusDeviceClass parent_class;
 
     uint8_t num_busses;
@@ -91,7 +94,7 @@ typedef struct AspeedI2CClass {
     bool check_sram;
     bool has_dma;
 
-} AspeedI2CClass;
+};
 
 I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr);
 
diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h
index f57808851e..a22f861451 100644
--- a/include/hw/i2c/i2c.h
+++ b/include/hw/i2c/i2c.h
@@ -2,6 +2,7 @@
 #define QEMU_I2C_H
 
 #include "hw/qdev-core.h"
+#include "qom/object.h"
 
 /* The QEMU I2C implementation only supports simple transfers that complete
    immediately.  It does not support slave devices that need to be able to
@@ -18,6 +19,7 @@ enum i2c_event {
 typedef struct I2CSlave I2CSlave;
 
 #define TYPE_I2C_SLAVE "i2c-slave"
+typedef struct I2CSlaveClass I2CSlaveClass;
 #define I2C_SLAVE(obj) \
      OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE)
 #define I2C_SLAVE_CLASS(klass) \
@@ -25,7 +27,7 @@ typedef struct I2CSlave I2CSlave;
 #define I2C_SLAVE_GET_CLASS(obj) \
      OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE)
 
-typedef struct I2CSlaveClass {
+struct I2CSlaveClass {
     DeviceClass parent_class;
 
     /* Master to slave. Returns non-zero for a NAK, 0 for success. */
@@ -43,7 +45,7 @@ typedef struct I2CSlaveClass {
      * return code is not used and should be zero.
      */
     int (*event)(I2CSlave *s, enum i2c_event event);
-} I2CSlaveClass;
+};
 
 struct I2CSlave {
     DeviceState qdev;
diff --git a/include/hw/i2c/imx_i2c.h b/include/hw/i2c/imx_i2c.h
index 7c73a1fa28..285a8f40a4 100644
--- a/include/hw/i2c/imx_i2c.h
+++ b/include/hw/i2c/imx_i2c.h
@@ -22,8 +22,10 @@
 #define IMX_I2C_H
 
 #include "hw/sysbus.h"
+#include "qom/object.h"
 
 #define TYPE_IMX_I2C "imx.i2c"
+typedef struct IMXI2CState IMXI2CState;
 #define IMX_I2C(obj) OBJECT_CHECK(IMXI2CState, (obj), TYPE_IMX_I2C)
 
 #define IMX_I2C_MEM_SIZE           0x14
@@ -65,7 +67,7 @@
 
 #define ADDR_RESET                 0xFF00
 
-typedef struct IMXI2CState {
+struct IMXI2CState {
     /*< private >*/
     SysBusDevice parent_obj;
 
@@ -82,6 +84,6 @@ typedef struct IMXI2CState {
     uint16_t i2sr;
     uint16_t i2dr_read;
     uint16_t i2dr_write;
-} IMXI2CState;
+};
 
 #endif /* IMX_I2C_H */
diff --git a/include/hw/i2c/microbit_i2c.h b/include/hw/i2c/microbit_i2c.h
index 2bff36680c..76ffaff47a 100644
--- a/include/hw/i2c/microbit_i2c.h
+++ b/include/hw/i2c/microbit_i2c.h
@@ -13,6 +13,7 @@
 
 #include "hw/sysbus.h"
 #include "hw/arm/nrf51.h"
+#include "qom/object.h"
 
 #define NRF51_TWI_TASK_STARTRX 0x000
 #define NRF51_TWI_TASK_STARTTX 0x008
@@ -26,17 +27,18 @@
 #define NRF51_TWI_REG_ADDRESS 0x588
 
 #define TYPE_MICROBIT_I2C "microbit.i2c"
+typedef struct MicrobitI2CState MicrobitI2CState;
 #define MICROBIT_I2C(obj) \
     OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C)
 
 #define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t))
 
-typedef struct {
+struct MicrobitI2CState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
     uint32_t regs[MICROBIT_I2C_NREGS];
     uint32_t read_idx;
-} MicrobitI2CState;
+};
 
 #endif /* MICROBIT_I2C_H */
diff --git a/include/hw/i2c/ppc4xx_i2c.h b/include/hw/i2c/ppc4xx_i2c.h
index f6f837fbec..3698e054b1 100644
--- a/include/hw/i2c/ppc4xx_i2c.h
+++ b/include/hw/i2c/ppc4xx_i2c.h
@@ -29,11 +29,13 @@
 
 #include "hw/sysbus.h"
 #include "hw/i2c/bitbang_i2c.h"
+#include "qom/object.h"
 
 #define TYPE_PPC4xx_I2C "ppc4xx-i2c"
+typedef struct PPC4xxI2CState PPC4xxI2CState;
 #define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C)
 
-typedef struct PPC4xxI2CState {
+struct PPC4xxI2CState {
     /*< private >*/
     SysBusDevice parent_obj;
 
@@ -57,6 +59,6 @@ typedef struct PPC4xxI2CState {
     uint8_t xfrcnt;
     uint8_t xtcntlss;
     uint8_t directcntl;
-} PPC4xxI2CState;
+};
 
 #endif /* PPC4XX_I2C_H */
diff --git a/include/hw/i2c/smbus_slave.h b/include/hw/i2c/smbus_slave.h
index ebe068304e..17f2cd2d8d 100644
--- a/include/hw/i2c/smbus_slave.h
+++ b/include/hw/i2c/smbus_slave.h
@@ -26,8 +26,11 @@
 #define HW_SMBUS_SLAVE_H
 
 #include "hw/i2c/i2c.h"
+#include "qom/object.h"
 
 #define TYPE_SMBUS_DEVICE "smbus-device"
+typedef struct SMBusDevice SMBusDevice;
+typedef struct SMBusDeviceClass SMBusDeviceClass;
 #define SMBUS_DEVICE(obj) \
      OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE)
 #define SMBUS_DEVICE_CLASS(klass) \
@@ -35,10 +38,8 @@
 #define SMBUS_DEVICE_GET_CLASS(obj) \
      OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE)
 
-typedef struct SMBusDevice SMBusDevice;
 
-typedef struct SMBusDeviceClass
-{
+struct SMBusDeviceClass {
     I2CSlaveClass parent_class;
 
     /*
@@ -67,7 +68,7 @@ typedef struct SMBusDeviceClass
      * return 0xff in that case.
      */
     uint8_t (*receive_byte)(SMBusDevice *dev);
-} SMBusDeviceClass;
+};
 
 #define SMBUS_DATA_MAX_LEN 34  /* command + len + 32 bytes of data.  */