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| author | David Woodhouse <dwmw@amazon.co.uk> | 2022-03-14 14:25:42 +0000 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2022-05-16 04:38:39 -0400 |
| commit | 8646d9c773d88c3f9a20919a96afa35e6230c1ee (patch) | |
| tree | 7e9883f6dc99ebfe2cccd9cde44778dd16954c65 /include/hw/i386/intel_iommu.h | |
| parent | dc89f32d92bba795b0665f075b78d8881cf67ab3 (diff) | |
| download | focaccia-qemu-8646d9c773d88c3f9a20919a96afa35e6230c1ee.tar.gz focaccia-qemu-8646d9c773d88c3f9a20919a96afa35e6230c1ee.zip | |
intel_iommu: Support IR-only mode without DMA translation
By setting none of the SAGAW bits we can indicate to a guest that DMA translation isn't supported. Tested by booting Windows 10, as well as Linux guests with the fix at https://git.kernel.org/torvalds/c/c40aaaac10 Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20220314142544.150555-2-dwmw2@infradead.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/i386/intel_iommu.h')
| -rw-r--r-- | include/hw/i386/intel_iommu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index bfa982a419..67653b0f9b 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -267,6 +267,7 @@ struct IntelIOMMUState { bool buggy_eim; /* Force buggy EIM unless eim=off */ uint8_t aw_bits; /* Host/IOVA address width (in bits) */ bool dma_drain; /* Whether DMA r/w draining enabled */ + bool dma_translation; /* Whether DMA translation supported */ /* * Protects IOMMU states in general. Currently it protects the |