summary refs log tree commit diff stats
path: root/include/hw/i386/intel_iommu.h
diff options
context:
space:
mode:
authorPeter Xu <peterx@redhat.com>2018-12-17 15:31:12 +0800
committerMichael S. Tsirkin <mst@redhat.com>2018-12-19 16:48:16 -0500
commitccc23bb08a84f3709b08cc10ffd4e819832fae6d (patch)
tree5bfcce0fb1b9f10714940bf1ce638693c1b7b0be /include/hw/i386/intel_iommu.h
parent095955b24d25715f38b78703dc0a295761bffaca (diff)
downloadfocaccia-qemu-ccc23bb08a84f3709b08cc10ffd4e819832fae6d.tar.gz
focaccia-qemu-ccc23bb08a84f3709b08cc10ffd4e819832fae6d.zip
intel_iommu: dma read/write draining support
Support DMA read/write draining should be easy for existing VT-d
emulation since the emulation itself does not have any request queue
there so we don't need to do anything to flush the un-commited queue.
What we need to do is to declare the support.

These capabilities are required to pass Windows SVVP test program.  It
is verified that when with parameters "x-aw-bits=48,caching-mode=off"
we can pass the Windows SVVP test with this patch applied.  Otherwise
we'll fail with:

        IOMMU[0] - DWD (DMA write draining) not supported
        IOMMU[0] - DWD (DMA read draining) not supported
        Segment 0 has no DMA remapping capable IOMMU units

However since these bits are not declared support for QEMU<=3.1, we'll
need a compatibility bit for it and we turn this on by default only
for QEMU>=4.0.

Please refer to VT-d spec 6.5.4 for more information.

CC: Yu Wang <wyu@redhat.com>
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1654550
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/i386/intel_iommu.h')
-rw-r--r--include/hw/i386/intel_iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index ed4e758273..a321cc9691 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -245,6 +245,7 @@ struct IntelIOMMUState {
     OnOffAuto intr_eim;             /* Toggle for EIM cabability */
     bool buggy_eim;                 /* Force buggy EIM unless eim=off */
     uint8_t aw_bits;                /* Host/IOVA address width (in bits) */
+    bool dma_drain;                 /* Whether DMA r/w draining enabled */
 
     /*
      * Protects IOMMU states in general.  Currently it protects the