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authorShashi Mallela <shashi.mallela@linaro.org>2021-09-13 16:07:23 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-09-13 16:07:54 +0100
commit1b08e436d0deaece35f7fa21aba6e6afe26cb3ac (patch)
treefd8926359e2e7f8da092e23f063d72919b03b9a8 /include/hw/intc/arm_gicv3_common.h
parent18f6290a6a95b2b16ab061bfd92274f6ba2a821b (diff)
downloadfocaccia-qemu-1b08e436d0deaece35f7fa21aba6e6afe26cb3ac.tar.gz
focaccia-qemu-1b08e436d0deaece35f7fa21aba6e6afe26cb3ac.zip
hw/intc: GICv3 ITS register definitions added
Defined descriptors for ITS device table,collection table and ITS
command queue entities.Implemented register read/write functions,
extract ITS table parameters and command queue parameters,extended
gicv3 common to capture qemu address space(which host the ITS table
platform memories required for subsequent ITS processing) and
initialize the same in ITS device.

Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Message-id: 20210910143951.92242-3-shashi.mallela@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc/arm_gicv3_common.h')
-rw-r--r--include/hw/intc/arm_gicv3_common.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h
index 91491a2f66..1fd5cedbbd 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -226,6 +226,9 @@ struct GICv3State {
     int dev_fd; /* kvm device fd if backed by kvm vgic support */
     Error *migration_blocker;
 
+    MemoryRegion *dma;
+    AddressSpace dma_as;
+
     /* Distributor */
 
     /* for a GIC with the security extensions the NS banked version of this