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| author | Tianrui Zhao <zhaotianrui@loongson.cn> | 2022-12-13 20:50:16 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-01-06 10:54:20 +0800 |
| commit | 6027d2740524cf04ab38564c0c299fddbeaa6723 (patch) | |
| tree | f0f9a702c6e6c766a08ecc875bfa8609bafe56fa /include/hw/intc | |
| parent | d1852caab131ea898134fdcea8c14bc2ee75fbe9 (diff) | |
| download | focaccia-qemu-6027d2740524cf04ab38564c0c299fddbeaa6723.tar.gz focaccia-qemu-6027d2740524cf04ab38564c0c299fddbeaa6723.zip | |
hw/intc/loongarch_pch_msi: add irq number property
This patch adds irq number property for loongarch msi interrupt controller, and remove hard coding irq number macro. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230104020518.2564263-2-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/loongarch_pch_msi.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/hw/intc/loongarch_pch_msi.h b/include/hw/intc/loongarch_pch_msi.h index 6d67560dea..c5a52bc327 100644 --- a/include/hw/intc/loongarch_pch_msi.h +++ b/include/hw/intc/loongarch_pch_msi.h @@ -15,8 +15,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI) struct LoongArchPCHMSI { SysBusDevice parent_obj; - qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM]; + qemu_irq *pch_msi_irq; MemoryRegion msi_mmio; /* irq base passed to upper extioi intc */ unsigned int irq_base; + unsigned int irq_num; }; |