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| author | Song Gao <gaosong@loongson.cn> | 2023-04-06 15:25:28 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-05-15 19:09:33 +0800 |
| commit | 646c39b220f789158313fee5d207f370e29c586a (patch) | |
| tree | 9c46867ad4f65aa45a301f402f323fb126ddeaae /include/hw/intc | |
| parent | 78464f023b5407c636239de43cef864d76098009 (diff) | |
| download | focaccia-qemu-646c39b220f789158313fee5d207f370e29c586a.tar.gz focaccia-qemu-646c39b220f789158313fee5d207f370e29c586a.zip | |
hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that loongarch virt machine supports more cpus. Interrupts from external devices can only be routed cpu 0-3 because of extioi limits, cpu internal interrupt such as timer/ipi can be triggered on all cpus. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230512100421.1867848-3-gaosong@loongson.cn>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/loongarch_extioi.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h index 15b8c999f6..fbdef9a7b3 100644 --- a/include/hw/intc/loongarch_extioi.h +++ b/include/hw/intc/loongarch_extioi.h @@ -14,6 +14,8 @@ #define LS3A_INTC_IP 8 #define EXTIOI_IRQS (256) #define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) +/* irq from EXTIOI is routed to no more than 4 cpus */ +#define EXTIOI_CPUS (4) /* map to ipnum per 32 irqs */ #define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) #define EXTIOI_IRQS_COREMAP_SIZE 256 @@ -46,17 +48,17 @@ struct LoongArchExtIOI { uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; uint32_t isr[EXTIOI_IRQS / 32]; - uint32_t coreisr[LOONGARCH_MAX_VCPUS][EXTIOI_IRQS_GROUP_COUNT]; + uint32_t coreisr[EXTIOI_CPUS][EXTIOI_IRQS_GROUP_COUNT]; uint32_t enable[EXTIOI_IRQS / 32]; uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; uint32_t coremap[EXTIOI_IRQS / 4]; uint32_t sw_pending[EXTIOI_IRQS / 32]; - DECLARE_BITMAP(sw_isr[LOONGARCH_MAX_VCPUS][LS3A_INTC_IP], EXTIOI_IRQS); + DECLARE_BITMAP(sw_isr[EXTIOI_CPUS][LS3A_INTC_IP], EXTIOI_IRQS); uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; uint8_t sw_coremap[EXTIOI_IRQS]; - qemu_irq parent_irq[LOONGARCH_MAX_VCPUS][LS3A_INTC_IP]; + qemu_irq parent_irq[EXTIOI_CPUS][LS3A_INTC_IP]; qemu_irq irq[EXTIOI_IRQS]; - MemoryRegion extioi_iocsr_mem[LOONGARCH_MAX_VCPUS]; + MemoryRegion extioi_iocsr_mem[EXTIOI_CPUS]; MemoryRegion extioi_system_mem; }; #endif /* LOONGARCH_EXTIOI_H */ |