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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-10-04 13:48:25 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-04 13:48:25 +0100 |
| commit | 6e11eb2d2b96790e647aa4c744ed2ed03a77fbbd (patch) | |
| tree | 764d96006cedc488328f6c346115d4e2e423bd0e /include/hw/intc | |
| parent | 1bb47107057c645945971cf4e13eb8b524915b71 (diff) | |
| parent | 9b6a3ea7a699594162ed3d11e4e04b98568dc5c0 (diff) | |
| download | focaccia-qemu-6e11eb2d2b96790e647aa4c744ed2ed03a77fbbd.tar.gz focaccia-qemu-6e11eb2d2b96790e647aa4c744ed2ed03a77fbbd.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161004' into staging
target-arm queue: * Netduino 2 improvements (SPI, ADC devices) * fix some Mainstone key mappings * vmstateify tsc210x, tsc2005 * virt: add 2.8 machine type * virt: support in-kernel GICv3 ITS * generic-loader device * A64: fix iss_sf decoding in disas_ld_lit * correctly handle 'sub pc, pc, 1' for ARMv6 # gpg: Signature made Tue 04 Oct 2016 13:41:34 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20161004: (27 commits) target-arm: Correctly handle 'sub pc, pc, 1' for ARMv6 target-arm: A64: Fix decoding of iss_sf in disas_ld_lit cadence_gem: Fix priority queue out of bounds access docs: Add a generic loader explanation document generic-loader: Add a generic loader ARM: Virt: ACPI: Add GIC ITS description in ACPI MADT table ACPI: Add GIC Interrupt Translation Service Structure definition arm/virt: Add ITS to the virt board hw/intc/arm_gicv3_its: Implement support for in-kernel ITS emulation kvm-all: Pass requester ID to MSI routing functions target-arm: move gicv3_class_name from machine to kvm_arm.h hw/intc/arm_gicv3_its: Implement ITS base class hw/intc/arm_gic(v3)_kvm: Initialize gsi routing hw/arm/virt: add 2.8 machine type vmstateify tsc210x vmstateify tsc2005 hw/arm: Fix Integrator/CM initialization mainstone: Add mapping for dot, slash and backspace. mainstone: Fix incorrect key mapping for Enter key. MAINTAINERS: Add Alistair to the maintainers list ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/arm_gicv3_its_common.h | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h new file mode 100644 index 0000000000..1ba18944cf --- /dev/null +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -0,0 +1,78 @@ +/* + * ITS support for ARM GICv3 + * + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * Written by Pavel Fedin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef QEMU_ARM_GICV3_ITS_COMMON_H +#define QEMU_ARM_GICV3_ITS_COMMON_H + +#include "hw/sysbus.h" +#include "hw/intc/arm_gicv3_common.h" + +#define ITS_CONTROL_SIZE 0x10000 +#define ITS_TRANS_SIZE 0x10000 +#define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE) + +struct GICv3ITSState { + SysBusDevice parent_obj; + + MemoryRegion iomem_main; + MemoryRegion iomem_its_cntrl; + MemoryRegion iomem_its_translation; + + GICv3State *gicv3; + + int dev_fd; /* kvm device fd if backed by kvm vgic support */ + uint64_t gits_translater_gpa; + bool translater_gpa_known; + + /* Registers */ + uint32_t ctlr; + uint64_t cbaser; + uint64_t cwriter; + uint64_t creadr; + uint64_t baser[8]; + + Error *migration_blocker; +}; + +typedef struct GICv3ITSState GICv3ITSState; + +void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops); + +#define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common" +#define ARM_GICV3_ITS_COMMON(obj) \ + OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON) +#define ARM_GICV3_ITS_COMMON_CLASS(klass) \ + OBJECT_CLASS_CHECK(GICv3ITSCommonClass, (klass), TYPE_ARM_GICV3_ITS_COMMON) +#define ARM_GICV3_ITS_COMMON_GET_CLASS(obj) \ + OBJECT_GET_CLASS(GICv3ITSCommonClass, (obj), TYPE_ARM_GICV3_ITS_COMMON) + +struct GICv3ITSCommonClass { + /*< private >*/ + SysBusDeviceClass parent_class; + /*< public >*/ + + int (*send_msi)(GICv3ITSState *s, uint32_t data, uint16_t devid); + void (*pre_save)(GICv3ITSState *s); + void (*post_load)(GICv3ITSState *s); +}; + +typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; + +#endif |