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| author | Christoffer Dall <christoffer.dall@linaro.org> | 2013-09-12 22:18:20 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-08 14:50:48 +0000 |
| commit | aa7d461ae9dd79d35999f4710743cdf9dec88cef (patch) | |
| tree | 8860063b9851b5f786eab320ae33283b4acb327b /include/hw/intc | |
| parent | 40d225009efe17cad647b4b7424b77a3ace232f1 (diff) | |
| download | focaccia-qemu-aa7d461ae9dd79d35999f4710743cdf9dec88cef.tar.gz focaccia-qemu-aa7d461ae9dd79d35999f4710743cdf9dec88cef.zip | |
arm_gic: Support setting/getting binary point reg
Add a binary_point field to the gic emulation structure and support setting/getting this register now when we have it. We don't actually support interrupt grouping yet, oh well. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/arm_gic_common.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h index d2e0c2f5f1..983c3cfa93 100644 --- a/include/hw/intc/arm_gic_common.h +++ b/include/hw/intc/arm_gic_common.h @@ -68,6 +68,13 @@ typedef struct GICState { uint16_t running_priority[GIC_NCPU]; uint16_t current_pending[GIC_NCPU]; + /* We present the GICv2 without security extensions to a guest and + * therefore the guest can configure the GICC_CTLR to configure group 1 + * binary point in the abpr. + */ + uint8_t bpr[GIC_NCPU]; + uint8_t abpr[GIC_NCPU]; + uint32_t num_cpu; MemoryRegion iomem; /* Distributor */ |