diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-03-05 15:09:49 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-03-09 09:28:28 +0000 |
| commit | ebe5bca2ef10eb4f239a2e6e6a6f8ec748af1952 (patch) | |
| tree | 9b30c83bb419c0e739ccddc86f53d139b5d43098 /include/hw/misc/mos6522.h | |
| parent | e787221ebfd4ff43b97fbbd1e9f8e0c4df7ff0c7 (diff) | |
| download | focaccia-qemu-ebe5bca2ef10eb4f239a2e6e6a6f8ec748af1952.tar.gz focaccia-qemu-ebe5bca2ef10eb4f239a2e6e6a6f8ec748af1952.zip | |
mos6522: switch over to use qdev gpios for IRQs
For historical reasons each mos6522 instance implements its own setting and update of the IFR flag bits using methods exposed by MOS6522DeviceClass. As of today this is no longer required, and it is now possible to implement the mos6522 IRQs as standard qdev gpios. Switch over to use qdev gpios for the mos6522 device and update all instances accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'include/hw/misc/mos6522.h')
| -rw-r--r-- | include/hw/misc/mos6522.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index be5c90d24d..f38ae2b0f0 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -57,6 +57,8 @@ #define T2_INT BIT(T2_INT_BIT) #define T1_INT BIT(T1_INT_BIT) +#define VIA_NUM_INTS 5 + /* Bits in ACR */ #define T1MODE 0xc0 /* Timer 1 mode */ #define T1MODE_CONT 0x40 /* continuous interrupts */ |