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| author | Rakesh Jeyasingh <rakeshjb010@gmail.com> | 2025-04-29 22:33:53 +0530 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-05-20 08:04:18 +0200 |
| commit | e5894fd6f411c113e2b5f62811e96eeb5b084381 (patch) | |
| tree | 882422b7389a6b2e76f5c61542e1cebe57dabad3 /include/hw/pci-host/dino.h | |
| parent | 7a48612306768833f8cc87418a5a53e712f26ac1 (diff) | |
| download | focaccia-qemu-e5894fd6f411c113e2b5f62811e96eeb5b084381.tar.gz focaccia-qemu-e5894fd6f411c113e2b5f62811e96eeb5b084381.zip | |
hw/pci-host/gt64120: Fix endianness handling
The GT-64120 PCI controller requires special handling where:
1. Host bridge(bus 0 ,device 0) must never be byte-swapped
2. Other devices follow MByteSwap bit in GT_PCI0_CMD
The previous implementation incorrectly swapped all accesses, breaking
host bridge detection (lspci -d 11ab:4620).
Changes made:
1. Removed gt64120_update_pci_cfgdata_mapping() and moved data_mem initialization
to gt64120_realize() for cleaner setup
2. Implemented custom read/write handlers that:
- Preserve host bridge accesses (extract32(config_reg,11,13)==0)
- apply swapping only for non-bridge devices in big-endian mode
Fixes: 145e2198 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2826
Signed-off-by: Rakesh Jeyasingh <rakeshjb010@gmail.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20250429170354.150581-2-rakeshjb010@gmail.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'include/hw/pci-host/dino.h')
0 files changed, 0 insertions, 0 deletions