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authorRichard Henderson <richard.henderson@linaro.org>2022-07-29 17:39:17 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-07-29 17:39:17 -0700
commit3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3 (patch)
treed1d61e002dc917bdc59f8f48b230dc711228b002 /include/hw/pci-host/ls7a.h
parentfc2cc19ffa02c86ec1471ec8fdbc39d33fcec626 (diff)
parent74725231d6fd1605d8b60c5afc2c0aec2f0b1e67 (diff)
downloadfocaccia-qemu-3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3.tar.gz
focaccia-qemu-3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3.zip
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
Rename ls7a to virt, when it's board not chipset related.

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLkfO8dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9UvAgAud1jhWBalaON0be6
# tC3UMB2Xe5Dzgm5yiLC7EspHci/HB/kSqbeXY436/hbU9iBXGEZkuTeQ1BX41Aq8
# D8LBzFAr35uySD5wfZbDdpefCvuBiDcb1SMpNXLC4I3zJj0Euj96j/IewIeJfGrc
# 0ZkJSq4jAOuPaU0NB1+Wmb9UsoMWhHQQOcIdz8ZpR0hjuU8yz7xAEGQosJNh/Acq
# Fdm6jDCOH4KY+uw/6dKF9poeSqpBDz3rCLicNNk6D+btDQybb2NzaVHE5ApLGRbW
# T0MnOf1ERoWTubAbJasKR/ODCt6Jby3kC9lZFsfOAqKjRXMYL/HexdJcM2UqKE9W
# E0aFjQ==
# =c3v3
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 29 Jul 2022 05:35:59 PM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu:
  hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX'
  hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/pci-host/ls7a.h')
-rw-r--r--include/hw/pci-host/ls7a.h43
1 files changed, 20 insertions, 23 deletions
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index 0fdc86b973..cdde0af1f8 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -15,34 +15,31 @@
 #include "qemu/range.h"
 #include "qom/object.h"
 
-#define LS7A_PCI_MEM_BASE        0x40000000UL
-#define LS7A_PCI_MEM_SIZE        0x40000000UL
-#define LS7A_PCI_IO_OFFSET      0x4000
-#define LS_PCIECFG_BASE         0x20000000
-#define LS_PCIECFG_SIZE         0x08000000
-#define LS7A_PCI_IO_BASE        0x18004000UL
-#define LS7A_PCI_IO_SIZE        0xC000
+#define VIRT_PCI_MEM_BASE        0x40000000UL
+#define VIRT_PCI_MEM_SIZE        0x40000000UL
+#define VIRT_PCI_IO_OFFSET       0x4000
+#define VIRT_PCI_CFG_BASE        0x20000000
+#define VIRT_PCI_CFG_SIZE        0x08000000
+#define VIRT_PCI_IO_BASE         0x18004000UL
+#define VIRT_PCI_IO_SIZE         0xC000
 
-#define LS7A_PCI_MEM_BASE       0x40000000UL
-#define LS7A_PCI_MEM_SIZE       0x40000000UL
-
-#define LS7A_PCH_REG_BASE       0x10000000UL
-#define LS7A_IOAPIC_REG_BASE    (LS7A_PCH_REG_BASE)
-#define LS7A_PCH_MSI_ADDR_LOW   0x2FF00000UL
+#define VIRT_PCH_REG_BASE        0x10000000UL
+#define VIRT_IOAPIC_REG_BASE     (VIRT_PCH_REG_BASE)
+#define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
 
 /*
  * According to the kernel pch irq start from 64 offset
  * 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
  * used for pci device.
  */
-#define PCH_PIC_IRQ_OFFSET      64
-#define LS7A_DEVICE_IRQS        16
-#define LS7A_PCI_IRQS           48
-#define LS7A_UART_IRQ           (PCH_PIC_IRQ_OFFSET + 2)
-#define LS7A_UART_BASE          0x1fe001e0
-#define LS7A_RTC_IRQ            (PCH_PIC_IRQ_OFFSET + 3)
-#define LS7A_MISC_REG_BASE      (LS7A_PCH_REG_BASE + 0x00080000)
-#define LS7A_RTC_REG_BASE       (LS7A_MISC_REG_BASE + 0x00050100)
-#define LS7A_RTC_LEN            0x100
-#define LS7A_SCI_IRQ            (PCH_PIC_IRQ_OFFSET + 4)
+#define PCH_PIC_IRQ_OFFSET       64
+#define VIRT_DEVICE_IRQS         16
+#define VIRT_PCI_IRQS            48
+#define VIRT_UART_IRQ            (PCH_PIC_IRQ_OFFSET + 2)
+#define VIRT_UART_BASE           0x1fe001e0
+#define VIRT_RTC_IRQ             (PCH_PIC_IRQ_OFFSET + 3)
+#define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
+#define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
+#define VIRT_RTC_LEN             0x100
+#define VIRT_SCI_IRQ             (PCH_PIC_IRQ_OFFSET + 4)
 #endif