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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-03-09 14:04:14 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-03-09 14:04:14 +0000 |
| commit | 277263e1b320d759a760ba6c5ea75ec268f929e5 (patch) | |
| tree | c934fd16bbcc865a23f4c8f66120072d55c68d32 /include/hw/pci-host/spapr.h | |
| parent | 0048fa6c807fc8fb5c52873562ea3debfa65f085 (diff) | |
| parent | a9ab06d1187f5967d315052da948afba6c3ba651 (diff) | |
| download | focaccia-qemu-277263e1b320d759a760ba6c5ea75ec268f929e5.tar.gz focaccia-qemu-277263e1b320d759a760ba6c5ea75ec268f929e5.zip | |
Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging
Patch queue for ppc - 2015-03-09 This is my current patch queue for 2.3. Highlights include: * pseries: 2.3 machine * pseries: Export RTC via QOM * pseries: EEH support * mac: save/restore support * fix POWER5 hosts * random bug fixes # gpg: Signature made Mon Mar 9 14:00:53 2015 GMT using RSA key ID 03FEDC60 # gpg: Good signature from "Alexander Graf <agraf@suse.de>" # gpg: aka "Alexander Graf <alex@csgraf.de>" * remotes/agraf/tags/signed-ppc-for-upstream: (38 commits) target-ppc: Fix warnings from Sparse sPAPR: Implement sPAPRPHBClass EEH callbacks sPAPR: Implement EEH RTAS calls target-ppc: Add versions to server CPU descriptions PPC: Introduce the Virtual Time Base (VTB) SPR register PPC: Remove duplicate OPENPIC defines in default-configs ppc64-softmmu: Remove duplicated OPENPIC from config Revert "default-configs/ppc64: add all components of i82378 SuperIO chip used by prep" spapr_vio: Convert to realize() openpic: convert to vmstate openpic: switch IRQQueue queue from inline to bitmap openpic: fix up loadvm under -M mac99 openpic: fix segfault on -M mac99 savevm target-ppc: force update of msr bits in cpu_post_load target-ppc: move sdr1 value change detection logic to helper_store_sdr1() cuda.c: include adb_poll_timer in VMStateDescription adb.c: include ADBDevice parent state in KBDState and MouseState macio.c: include parent PCIDevice state in VMStateDescription display cpu id dump state Openpic: check that cpu id is within the number of cpus ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/pci-host/spapr.h')
| -rw-r--r-- | include/hw/pci-host/spapr.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 4ea2a0d14a..895d273fee 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -49,6 +49,10 @@ struct sPAPRPHBClass { PCIHostBridgeClass parent_class; void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); + int (*eeh_set_option)(sPAPRPHBState *sphb, unsigned int addr, int option); + int (*eeh_get_state)(sPAPRPHBState *sphb, int *state); + int (*eeh_reset)(sPAPRPHBState *sphb, int option); + int (*eeh_configure)(sPAPRPHBState *sphb); }; typedef struct spapr_pci_msi { @@ -64,7 +68,7 @@ typedef struct spapr_pci_msi_mig { struct sPAPRPHBState { PCIHostState parent_obj; - int32_t index; + uint32_t index; uint64_t buid; char *dtbusname; @@ -94,19 +98,22 @@ struct sPAPRPHBVFIOState { int32_t iommugroupid; }; +#define SPAPR_PCI_MAX_INDEX 255 + #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL +#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL + #define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL #define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL #define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000 -#define SPAPR_PCI_MMIO_WIN_SIZE 0x20000000 +#define SPAPR_PCI_MMIO_WIN_SIZE (SPAPR_PCI_WINDOW_SPACING - \ + SPAPR_PCI_MEM_WIN_BUS_OFFSET) #define SPAPR_PCI_IO_WIN_OFF 0x80000000 #define SPAPR_PCI_IO_WIN_SIZE 0x10000 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL -#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL - static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) { return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); |