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authorPeter Maydell <peter.maydell@linaro.org>2017-09-08 16:04:42 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-08 16:04:42 +0100
commitfcea73709b966a7ded9efa7b106ea50c7fe9025c (patch)
tree3a68a579a3831ae4c3e4c9eb486dce709e55d4b3 /include/hw/pci/pci_bridge.h
parenta1ae46d1b4f2a95ad5d3da8d15bc6403bcdbb24a (diff)
parent6f6f4aec749ba9a4fb58c7c20536a61b0381ff35 (diff)
downloadfocaccia-qemu-fcea73709b966a7ded9efa7b106ea50c7fe9025c.tar.gz
focaccia-qemu-fcea73709b966a7ded9efa7b106ea50c7fe9025c.zip
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, pci, virtio: patches queued before 2.10

A bunch of stuff that was posted before the 2.10 timeframe,
mostly fixes/cleanups.  New PCI bridges.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Fri 08 Sep 2017 14:15:34 BST
# gpg:                using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  fw_cfg: rename read callback
  pci: add reserved slot check to do_pci_register_device()
  pci: move check for existing devfn into new pci_bus_devfn_available() helper
  vmgenid: replace x-write-pointer-available hack
  vhost-user-bridge: fix resume regression (since 2.9)
  libvhost-user: support resuming vq->last_avail_idx based on used_idx
  acpi/vmgenid: change device category to misc
  intel_iommu: fix missing BQL in pt fast path
  docs: update documentation considering PCIE-PCI bridge
  hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port
  hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware
  hw/pci: introduce pcie-pci-bridge device
  Revert "ACPI: don't call acpi_pcihp_device_plug_cb on xen"
  hw/acpi: Move acpi_set_pci_info to pcihp
  hw/acpi: Limit hotplug to root bus on legacy mode
  pc: add 2.11 machine types
  vhost: Release memory references on cleanup

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/pci/pci_bridge.h')
-rw-r--r--include/hw/pci/pci_bridge.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index ff7cbaa227..1acadc2c15 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -67,4 +67,29 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
 #define  PCI_BRIDGE_CTL_DISCARD_STATUS	0x400	/* Discard timer status */
 #define  PCI_BRIDGE_CTL_DISCARD_SERR	0x800	/* Discard timer SERR# enable */
 
+typedef struct PCIBridgeQemuCap {
+    uint8_t id;     /* Standard PCI capability header field */
+    uint8_t next;   /* Standard PCI capability header field */
+    uint8_t len;    /* Standard PCI vendor-specific capability header field */
+    uint8_t type;   /* Red Hat vendor-specific capability type.
+                       Types are defined with REDHAT_PCI_CAP_ prefix */
+
+    uint32_t bus_res;   /* Minimum number of buses to reserve */
+    uint64_t io;        /* IO space to reserve */
+    uint32_t mem;       /* Non-prefetchable memory to reserve */
+    /* At most one of the following two fields may be set to a value
+     * different from -1 */
+    uint32_t mem_pref_32; /* Prefetchable memory to reserve (32-bit MMIO) */
+    uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */
+} PCIBridgeQemuCap;
+
+#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
+
+int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
+                              uint32_t bus_reserve, uint64_t io_reserve,
+                              uint32_t mem_non_pref_reserve,
+                              uint32_t mem_pref_32_reserve,
+                              uint64_t mem_pref_64_reserve,
+                              Error **errp);
+
 #endif /* QEMU_PCI_BRIDGE_H */