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| author | Gabriel Laupre <glaupre@chelsio.com> | 2015-07-06 12:15:15 -0600 |
|---|---|---|
| committer | Alex Williamson <alex.williamson@redhat.com> | 2015-07-06 12:15:15 -0600 |
| commit | 43302969966bc3a95470bfc300289a83068ef5d9 (patch) | |
| tree | da1539c1ecffd1f57106a4fd6149fa792b783865 /include/hw/pci/pci_ids.h | |
| parent | f8d8a944009b7e836c718a05590ea6b36146978f (diff) | |
| download | focaccia-qemu-43302969966bc3a95470bfc300289a83068ef5d9.tar.gz focaccia-qemu-43302969966bc3a95470bfc300289a83068ef5d9.zip | |
vfio/pci : Add pba_offset PCI quirk for Chelsio T5 devices
Fix pba_offset initialization value for Chelsio T5 Virtual Function device. The T5 hardware has a bug in it where it reports a Pending Interrupt Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions instead of the 0x1000 that the hardware actually uses internally. As the hardware doesn't return the correct pba_offset value, add a quirk to instead return a hardcoded value of 0x1000 when a Chelsio T5 VF device is detected. This bug has been fixed in the Chelsio's next chip series T6 but there are no plans to respin the T5 ASIC for this bug. It is just documented in the T5 Errata and left it at that. Signed-off-by: Gabriel Laupre <glaupre@chelsio.com> Reviewed-by: Bandan Das <bsd@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Diffstat (limited to 'include/hw/pci/pci_ids.h')
| -rw-r--r-- | include/hw/pci/pci_ids.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h index 49c062b8ce..d98e6c915d 100644 --- a/include/hw/pci/pci_ids.h +++ b/include/hw/pci/pci_ids.h @@ -114,6 +114,8 @@ #define PCI_VENDOR_ID_ENSONIQ 0x1274 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 +#define PCI_VENDOR_ID_CHELSIO 0x1425 + #define PCI_VENDOR_ID_FREESCALE 0x1957 #define PCI_DEVICE_ID_MPC8533E 0x0030 |