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| author | Laurent Vivier <lvivier@redhat.com> | 2021-12-08 14:03:47 +0100 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2021-12-15 08:07:04 +0100 |
| commit | efe84f03ea88db49ae9180a9ffe4634349333c4e (patch) | |
| tree | ba353867b4b42e96ef27fa243e3d1bd540821bf4 /include/hw/pci | |
| parent | 76b56fdfc9fa43ec6e5986aee33f108c6c6a511e (diff) | |
| download | focaccia-qemu-efe84f03ea88db49ae9180a9ffe4634349333c4e.tar.gz focaccia-qemu-efe84f03ea88db49ae9180a9ffe4634349333c4e.zip | |
qtest/libqos: add a function to initialize secondary PCI buses
Scan the PCI devices to find bridge and set PCI_SECONDARY_BUS and PCI_SUBORDINATE_BUS (algorithm from seabios) Signed-off-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211208130350.10178-2-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'include/hw/pci')
| -rw-r--r-- | include/hw/pci/pci_bridge.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index a94d350034..30691a6e57 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -138,6 +138,7 @@ typedef struct PCIBridgeQemuCap { uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */ } PCIBridgeQemuCap; +#define REDHAT_PCI_CAP_TYPE_OFFSET 3 #define REDHAT_PCI_CAP_RESOURCE_RESERVE 1 /* @@ -152,6 +153,13 @@ typedef struct PCIResReserve { uint64_t mem_pref_64; } PCIResReserve; +#define REDHAT_PCI_CAP_RES_RESERVE_BUS_RES 4 +#define REDHAT_PCI_CAP_RES_RESERVE_IO 8 +#define REDHAT_PCI_CAP_RES_RESERVE_MEM 16 +#define REDHAT_PCI_CAP_RES_RESERVE_PREF_MEM_32 20 +#define REDHAT_PCI_CAP_RES_RESERVE_PREF_MEM_64 24 +#define REDHAT_PCI_CAP_RES_RESERVE_CAP_SIZE 32 + int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, PCIResReserve res_reserve, Error **errp); |