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authorNicholas Piggin <npiggin@gmail.com>2024-06-18 13:09:54 +1000
committerNicholas Piggin <npiggin@gmail.com>2024-07-26 09:21:06 +1000
commit78be3218940c0902d165f42ad0cdcd38e66c5df2 (patch)
tree8ace6e795aa4ba67ae431b24defe0d94e1fdd5f6 /include/hw/ppc/pnv_core.h
parent16ffcb3401ddb991ec746de05595ba62eae45a1b (diff)
downloadfocaccia-qemu-78be3218940c0902d165f42ad0cdcd38e66c5df2.tar.gz
focaccia-qemu-78be3218940c0902d165f42ad0cdcd38e66c5df2.zip
ppc/pnv: Add POWER10 ChipTOD quirk for big-core
POWER10 has a quirk in its ChipTOD addressing that requires the even
small-core to be selected even when programming the odd small-core.
This allows skiboot chiptod init to run in big-core mode.

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'include/hw/ppc/pnv_core.h')
-rw-r--r--include/hw/ppc/pnv_core.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 50164e9e1f..c8784777a4 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -27,6 +27,13 @@
 
 /* Per-core ChipTOD / TimeBase state */
 typedef struct PnvCoreTODState {
+    /*
+     * POWER10 DD2.0 - big core TFMR drives the state machine on the even
+     * small core. Skiboot has a workaround that targets the even small core
+     * for CHIPTOD_TO_TB ops.
+     */
+    bool big_core_quirk;
+
     int tb_ready_for_tod; /* core TB ready to receive TOD from chiptod */
     int tod_sent_to_tb;   /* chiptod sent TOD to the core TB */