summary refs log tree commit diff stats
path: root/include/hw/ppc
diff options
context:
space:
mode:
authorBALATON Zoltan <balaton@eik.bme.hu>2022-10-19 18:02:54 +0200
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-10-28 13:15:23 -0300
commit080741abc293e79b6e860e2c8d66bfe519090c86 (patch)
tree8867e49867abebe05cb87958eb317844a6bde3f5 /include/hw/ppc
parentfa446fc54082c0c87a2edf7048bd17112773f0ef (diff)
downloadfocaccia-qemu-080741abc293e79b6e860e2c8d66bfe519090c86.tar.gz
focaccia-qemu-080741abc293e79b6e860e2c8d66bfe519090c86.zip
ppc4xx_sdram: Move ppc4xx_sdram_banks() to ppc4xx_sdram.c
This function is only used by the ppc4xx memory controller models so
it can be made static.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <b1504a82157a586aa284e8ee3b427b9a07b24169.1666194485.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/ppc4xx.h20
1 files changed, 8 insertions, 12 deletions
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 10c6dd535f..f8c86e09ec 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -29,18 +29,6 @@
 #include "exec/memory.h"
 #include "hw/sysbus.h"
 
-typedef struct {
-    MemoryRegion ram;
-    MemoryRegion container; /* used for clipping */
-    hwaddr base;
-    hwaddr size;
-    uint32_t bcr;
-} Ppc4xxSdramBank;
-
-void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
-                        Ppc4xxSdramBank ram_banks[],
-                        const ram_addr_t sdram_bank_sizes[]);
-
 #define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
 
 /*
@@ -111,6 +99,14 @@ struct Ppc4xxEbcState {
 };
 
 /* SDRAM DDR controller */
+typedef struct {
+    MemoryRegion ram;
+    MemoryRegion container; /* used for clipping */
+    hwaddr base;
+    hwaddr size;
+    uint32_t bcr;
+} Ppc4xxSdramBank;
+
 #define SDR0_DDR0_DDRM_ENCODE(n)  ((((unsigned long)(n)) & 0x03) << 29)
 #define SDR0_DDR0_DDRM_DDR1       0x20000000
 #define SDR0_DDR0_DDRM_DDR2       0x40000000