diff options
| author | Sam Bobroff <sam.bobroff@au1.ibm.com> | 2017-04-27 16:32:03 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-05-11 09:45:15 +1000 |
| commit | 229e16fd247c7d39822627916d18b52f733cbfa1 (patch) | |
| tree | 07f616752167eb37f19eb55eed6651db2b1f9122 /include/hw/ppc | |
| parent | 063cb7cbc9f65ff4095df884cfcd7eaf3a160555 (diff) | |
| download | focaccia-qemu-229e16fd247c7d39822627916d18b52f733cbfa1.tar.gz focaccia-qemu-229e16fd247c7d39822627916d18b52f733cbfa1.zip | |
ppc/xics: preserve P and Q bits for KVM IRQs
Kernel commit 17d48610ae0f ("KVM: PPC: Book 3S: XICS: Implement ICS
P/Q states") added new bits to the state used by KVM IRQs. Currently,
QEMU does not preserve these bits, so migrating (or otherwise saving
and restoring) the guest state causes the P and Q bits to be cleared.
Clearing the P bit has no effect, because the kernel will set it based
on other data, but the loss of a set Q bit will cause a lost
interrupt.
This patch preserves the P and Q bits, correcting the problem.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/xics.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index c215dc72a4..68525c80d1 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -144,6 +144,8 @@ struct ICSIRQState { #define XICS_STATUS_SENT 0x2 #define XICS_STATUS_REJECTED 0x4 #define XICS_STATUS_MASKED_PENDING 0x8 +#define XICS_STATUS_PRESENTED 0x10 +#define XICS_STATUS_QUEUED 0x20 uint8_t status; /* (flags & XICS_FLAGS_IRQ_MASK) == 0 means the interrupt is not allocated */ #define XICS_FLAGS_IRQ_LSI 0x1 |