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authorAlexey Kardashevskiy <aik@ozlabs.ru>2013-09-27 18:10:18 +1000
committerAlexander Graf <agraf@suse.de>2013-10-25 23:25:46 +0200
commit4fe822e075d6befa3714f7066158678e92cedb8b (patch)
tree43e4e4b3cf9d39a654ec68d04cf0a8357045bba4 /include/hw/ppc
parentdcb861cb883e9e6d236514a4d0b4def4db736d13 (diff)
downloadfocaccia-qemu-4fe822e075d6befa3714f7066158678e92cedb8b.tar.gz
focaccia-qemu-4fe822e075d6befa3714f7066158678e92cedb8b.zip
spapr-rtas: fix h_rtas parameters reading
On the real hardware, RTAS is called in real mode and therefore
top 4 bits of the address passed in the call are ignored.
So does the patch.

This converts h_rtas() to use existing rtas_ld() handlers.

This fixed rtas_ld()/rtas_st() to ignore top 4 bits.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/spapr.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index e37b41983c..6407c8a467 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -332,14 +332,19 @@ static inline int spapr_allocate_lsi(int hint)
     return spapr_allocate_irq(hint, true);
 }
 
+static inline uint64_t ppc64_phys_to_real(uint64_t addr)
+{
+    return addr & ~0xF000000000000000ULL;
+}
+
 static inline uint32_t rtas_ld(target_ulong phys, int n)
 {
-    return ldl_be_phys(phys + 4*n);
+    return ldl_be_phys(ppc64_phys_to_real(phys + 4*n));
 }
 
 static inline void rtas_st(target_ulong phys, int n, uint32_t val)
 {
-    stl_be_phys(phys + 4*n, val);
+    stl_be_phys(ppc64_phys_to_real(phys + 4*n), val);
 }
 
 typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr,