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| author | Cédric Le Goater <clg@kaod.org> | 2023-10-16 17:20:13 -0500 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-11-07 15:49:41 -0300 |
| commit | 5f0661215454959e98f69e7d3933e793d884282d (patch) | |
| tree | df3fa7dbc09c1f91f051e4f0aef6253fac13b821 /include/hw/ppc | |
| parent | 263b81ee15af05cbb2ad284aadabb0981a19c941 (diff) | |
| download | focaccia-qemu-5f0661215454959e98f69e7d3933e793d884282d.tar.gz focaccia-qemu-5f0661215454959e98f69e7d3933e793d884282d.zip | |
ppc/pnv: Connect I2C controller model to powernv9 chip
Wires up three I2C controller instances to the powernv9 chip XSCOM address space. Each controller instance is wired up to a single I2C bus of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring from addition of model itself] [milesg: Added new commit message] [milesg: Moved hardcoded attributes into PnvChipClass] [milesg: Removed TODO comment for I2C] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-3-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/pnv_chip.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h index 53e1d921d7..90cfbad1a5 100644 --- a/include/hw/ppc/pnv_chip.h +++ b/include/hw/ppc/pnv_chip.h @@ -9,6 +9,7 @@ #include "hw/ppc/pnv_psi.h" #include "hw/ppc/pnv_sbe.h" #include "hw/ppc/pnv_xive.h" +#include "hw/ppc/pnv_i2c.h" #include "hw/sysbus.h" OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass, @@ -86,6 +87,10 @@ struct Pnv9Chip { #define PNV9_CHIP_MAX_PEC 3 PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC]; + +#define PNV9_CHIP_MAX_I2C 3 +#define PNV9_CHIP_MAX_I2C_PORTS 1 + PnvI2C i2c[PNV9_CHIP_MAX_I2C]; }; /* @@ -130,6 +135,9 @@ struct PnvChipClass { uint32_t num_pecs; uint32_t num_phbs; + uint32_t i2c_num_engines; + uint32_t i2c_num_ports; + DeviceRealize parent_realize; uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); |