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authorPeter Maydell <peter.maydell@linaro.org>2017-09-08 14:44:44 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-08 14:44:44 +0100
commita1ae46d1b4f2a95ad5d3da8d15bc6403bcdbb24a (patch)
treeb2d02f48aa15e70cecc4c61401634d122d408035 /include/hw/ppc
parent74bbfe024da80a50dbe51fbb17f219d2f3e4d2dd (diff)
parent7cca3e466eb0baa36d1cc29d5aeb5da74a260711 (diff)
downloadfocaccia-qemu-a1ae46d1b4f2a95ad5d3da8d15bc6403bcdbb24a.tar.gz
focaccia-qemu-a1ae46d1b4f2a95ad5d3da8d15bc6403bcdbb24a.zip
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20170908' into staging
ppc patch queue 2017-09-08

This is the first batch of ppc related patches for qemu-2.11, and it's
accumulated quite a few things.  Includes:

  * A cleanup to handling of ppc cpu models from Igor
  * First parts of fixes to handling of guest vs. host SMT modes from
    Sam Bobroff
  * Preliminary patches towards supporting the Sam460 board from
    Balaton Zoltan
  * Several fixes for hotplug logic
  * Assorted other fixes and cleanups

# gpg: Signature made Fri 08 Sep 2017 06:28:42 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20170908: (40 commits)
  ppc: spapr: Move VCPU ID calculation into sPAPR
  ppc: remove non implemented cpu models
  ppc: drop caching ObjectClass from PowerPCCPUAlias
  ppc: simplify cpu model lookup by PVR
  ppc: replace inter-function cyclic dependency/recurssion with 2 simple lookups
  ppc: make cpu alias point only to real cpu models
  ppc: make cpu_model translation to type consistent
  ppc: use macros to make cpu type name from string literal
  target/ppc: Remove old STATUS file
  PPC: KVM: Support machine option to set VSMT mode
  spapr: fallback to raw mode if best compat mode cannot be set during CAS
  hw/nvram/spapr_nvram: Device can not be created by the users
  hw/ppc/spapr_cpu_core: Add a proper check for spapr machine
  ppc4xx: Export ECB and PLB emulation
  ppc4xx_i2c: Move to hw/i2c
  ppc4xx_i2c: QOMify
  ppc4xx: Split off 4xx I2C emulation from ppc405_uc to its own file
  ppc4xx: Make MAL emulation more generic
  ppc4xx: Move MAL from ppc405_uc to ppc4xx_devs
  spapr_iommu: Realloc guest visible TCE table when hot(un)plugging vfio-pci
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/ppc4xx.h3
-rw-r--r--include/hw/ppc/spapr.h5
-rw-r--r--include/hw/ppc/spapr_drc.h1
3 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 66e57a5194..cb0bb55cec 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -53,6 +53,9 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks,
                         hwaddr *ram_sizes,
                         int do_init);
 
+void ppc4xx_mal_init(CPUPPCState *env, uint8_t txcnum, uint8_t rxcnum,
+                     qemu_irq irqs[4]);
+
 #define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
 
 #endif /* PPC4XX_H */
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 2a303a705c..c1b365f564 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -99,6 +99,7 @@ struct sPAPRMachineState {
     uint64_t rtc_offset; /* Now used only during incoming migration */
     struct PPCTimebase tb;
     bool has_graphics;
+    uint32_t vsmt;       /* Virtual SMT mode (KVM's "core stride") */
 
     Notifier epow_notifier;
     QTAILQ_HEAD(, sPAPREventLogEntry) pending_events;
@@ -662,6 +663,7 @@ void spapr_cpu_parse_features(sPAPRMachineState *spapr);
 int spapr_hpt_shift_for_ramsize(uint64_t ramsize);
 void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
                           Error **errp);
+void spapr_clear_pending_events(sPAPRMachineState *spapr);
 
 /* CPU and LMB DRC release callbacks. */
 void spapr_core_release(DeviceState *dev);
@@ -704,4 +706,7 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg);
 
 #define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))
 
+int spapr_vcpu_id(PowerPCCPU *cpu);
+PowerPCCPU *spapr_find_cpu(int vcpu_id);
+
 #endif /* HW_SPAPR_H */
diff --git a/include/hw/ppc/spapr_drc.h b/include/hw/ppc/spapr_drc.h
index a7958d0a8d..f8d9f5b231 100644
--- a/include/hw/ppc/spapr_drc.h
+++ b/include/hw/ppc/spapr_drc.h
@@ -257,6 +257,7 @@ int spapr_drc_populate_dt(void *fdt, int fdt_offset, Object *owner,
 void spapr_drc_attach(sPAPRDRConnector *drc, DeviceState *d, void *fdt,
                       int fdt_start_offset, Error **errp);
 void spapr_drc_detach(sPAPRDRConnector *drc);
+bool spapr_drc_needed(void *opaque);
 
 static inline bool spapr_drc_unplug_requested(sPAPRDRConnector *drc)
 {