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| author | Bin Meng <bin.meng@windriver.com> | 2020-09-01 09:39:10 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:19 -0700 |
| commit | a47ef6e93ab2ca1db8d5ecb61fda3c41f926a26b (patch) | |
| tree | 00c66845ba4693643cd3bd41f190908b781543fd /include/hw/riscv/sifive_clint.h | |
| parent | ce908a2f6f6d6e1d8ede485ee3f9f7d36ee3533c (diff) | |
| download | focaccia-qemu-a47ef6e93ab2ca1db8d5ecb61fda3c41f926a26b.tar.gz focaccia-qemu-a47ef6e93ab2ca1db8d5ecb61fda3c41f926a26b.zip | |
hw/riscv: clint: Avoid using hard-coded timebase frequency
At present the CLINT timestamp is using a hard-coded timebase frequency value SIFIVE_CLINT_TIMEBASE_FREQ. This might not be true for all boards. Add a new 'timebase-freq' property to the CLINT device, and update various functions to accept this as a parameter. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-16-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv/sifive_clint.h')
| -rw-r--r-- | include/hw/riscv/sifive_clint.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/hw/riscv/sifive_clint.h b/include/hw/riscv/sifive_clint.h index 9f5fb3d31d..a30be0f3d6 100644 --- a/include/hw/riscv/sifive_clint.h +++ b/include/hw/riscv/sifive_clint.h @@ -39,11 +39,13 @@ typedef struct SiFiveCLINTState { uint32_t timecmp_base; uint32_t time_base; uint32_t aperture_size; + uint32_t timebase_freq; } SiFiveCLINTState; DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t hartid_base, uint32_t num_harts, uint32_t sip_base, - uint32_t timecmp_base, uint32_t time_base, bool provide_rdtime); + uint32_t timecmp_base, uint32_t time_base, uint32_t timebase_freq, + bool provide_rdtime); enum { SIFIVE_SIP_BASE = 0x0, |