diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2020-12-16 10:22:34 -0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-12-17 21:56:44 -0800 |
| commit | 09fe17125ec9a2166cf9bef360811dde714b3874 (patch) | |
| tree | 887b4a6302be7c9a75923329be15c004cc14a6fc /include/hw/riscv/virt.h | |
| parent | dc4d4aaee31cd3ac4020d3b15729f0a104ce8862 (diff) | |
| download | focaccia-qemu-09fe17125ec9a2166cf9bef360811dde714b3874.tar.gz focaccia-qemu-09fe17125ec9a2166cf9bef360811dde714b3874.zip | |
riscv: virt: Remove target macro conditionals
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com
Diffstat (limited to 'include/hw/riscv/virt.h')
| -rw-r--r-- | include/hw/riscv/virt.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index b4ed9a32eb..84b7a3848f 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -89,10 +89,4 @@ enum { #define FDT_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + 1 + \ FDT_PLIC_ADDR_CELLS + FDT_PLIC_INT_CELLS) -#if defined(TARGET_RISCV32) -#define VIRT_CPU TYPE_RISCV_CPU_BASE32 -#elif defined(TARGET_RISCV64) -#define VIRT_CPU TYPE_RISCV_CPU_BASE64 -#endif - #endif |