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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-03-12 17:34:34 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-12 17:34:34 +0000 |
| commit | d4f7d56759f7c75270c13d5f3f5f736a9558929c (patch) | |
| tree | 71d7cfda9c4a204a5ab13dd4d19c7c980e1a3877 /include/hw/rtc | |
| parent | 49780a582d8bcedf098237f8997214c8424124be (diff) | |
| parent | aca53be34ac3e7cac5f39396a51a338860a5a837 (diff) | |
| download | focaccia-qemu-d4f7d56759f7c75270c13d5f3f5f736a9558929c.tar.gz focaccia-qemu-d4f7d56759f7c75270c13d5f3f5f736a9558929c.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200312' into staging
target-arm queue: * Fix various bugs that might result in an assert() due to incorrect hflags for M-profile CPUs * Fix Aspeed SMC Controller user-mode select handling * Report correct (with-tag) address in fault address register when TBI is enabled * cubieboard: make sure SOC object isn't leaked * fsl-imx25: Wire up eSDHC controllers * fsl-imx25: Wire up USB controllers * New board model: orangepi-pc (OrangePi PC) * ARM/KVM: if user doesn't select GIC version and the host kernel can only provide GICv3, use that, rather than defaulting to "fail because GICv2 isn't possible" * kvm: Only do KVM_SET_VCPU_EVENTS at the last stage of sync # gpg: Signature made Thu 12 Mar 2020 16:43:46 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200312: (36 commits) target/arm: kvm: Inject events at the last stage of sync hw/arm/virt: kvm: allow gicv3 by default if v2 cannot work hw/arm/virt: kvm: Restructure finalize_gic_version() target/arm/kvm: Let kvm_arm_vgic_probe() return a bitmap hw/arm/virt: Introduce finalize_gic_version() hw/arm/virt: Introduce VirtGICType enum type hw/arm/virt: Document 'max' value in gic-version property description docs: add Orange Pi PC document tests/boot_linux_console: Test booting NetBSD via U-Boot on OrangePi PC tests/boot_linux_console: Add a SLOW test booting Ubuntu on OrangePi PC tests/boot_linux_console: Add a SD card test for the OrangePi PC board tests/boot_linux_console: Add initrd test for the Orange Pi PC board tests/boot_linux_console: Add a quick test for the OrangePi PC board hw/arm/allwinner: add RTC device support hw/arm/allwinner-h3: add SDRAM controller device hw/arm/allwinner-h3: add Boot ROM support hw/arm/allwinner-h3: add EMAC ethernet device hw/arm/allwinner: add SD/MMC host controller hw/arm/allwinner: add Security Identifier device hw/arm/allwinner: add CPU Configuration module ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/rtc')
| -rw-r--r-- | include/hw/rtc/allwinner-rtc.h | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/include/hw/rtc/allwinner-rtc.h b/include/hw/rtc/allwinner-rtc.h new file mode 100644 index 0000000000..7893f74795 --- /dev/null +++ b/include/hw/rtc/allwinner-rtc.h @@ -0,0 +1,134 @@ +/* + * Allwinner Real Time Clock emulation + * + * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef HW_MISC_ALLWINNER_RTC_H +#define HW_MISC_ALLWINNER_RTC_H + +#include "qom/object.h" +#include "hw/sysbus.h" + +/** + * Constants + * @{ + */ + +/** Highest register address used by RTC device */ +#define AW_RTC_REGS_MAXADDR (0x200) + +/** Total number of known registers */ +#define AW_RTC_REGS_NUM (AW_RTC_REGS_MAXADDR / sizeof(uint32_t)) + +/** @} */ + +/** + * Object model types + * @{ + */ + +/** Generic Allwinner RTC device (abstract) */ +#define TYPE_AW_RTC "allwinner-rtc" + +/** Allwinner RTC sun4i family (A10, A12) */ +#define TYPE_AW_RTC_SUN4I TYPE_AW_RTC "-sun4i" + +/** Allwinner RTC sun6i family and newer (A31, H2+, H3, etc) */ +#define TYPE_AW_RTC_SUN6I TYPE_AW_RTC "-sun6i" + +/** Allwinner RTC sun7i family (A20) */ +#define TYPE_AW_RTC_SUN7I TYPE_AW_RTC "-sun7i" + +/** @} */ + +/** + * Object model macros + * @{ + */ + +#define AW_RTC(obj) \ + OBJECT_CHECK(AwRtcState, (obj), TYPE_AW_RTC) +#define AW_RTC_CLASS(klass) \ + OBJECT_CLASS_CHECK(AwRtcClass, (klass), TYPE_AW_RTC) +#define AW_RTC_GET_CLASS(obj) \ + OBJECT_GET_CLASS(AwRtcClass, (obj), TYPE_AW_RTC) + +/** @} */ + +/** + * Allwinner RTC per-object instance state. + */ +typedef struct AwRtcState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + /** + * Actual year represented by the device when year counter is zero + * + * Can be overridden by the user using the corresponding 'base-year' + * property. The base year used by the target OS driver can vary, for + * example the Linux driver for sun6i uses 1970 while NetBSD uses 2000. + */ + int base_year; + + /** Maps I/O registers in physical memory */ + MemoryRegion iomem; + + /** Array of hardware registers */ + uint32_t regs[AW_RTC_REGS_NUM]; + +} AwRtcState; + +/** + * Allwinner RTC class-level struct. + * + * This struct is filled by each sunxi device specific code + * such that the generic code can use this struct to support + * all devices. + */ +typedef struct AwRtcClass { + /*< private >*/ + SysBusDeviceClass parent_class; + /*< public >*/ + + /** Defines device specific register map */ + const uint8_t *regmap; + + /** Size of the regmap in bytes */ + size_t regmap_size; + + /** + * Read device specific register + * + * @offset: register offset to read + * @return true if register read successful, false otherwise + */ + bool (*read)(AwRtcState *s, uint32_t offset); + + /** + * Write device specific register + * + * @offset: register offset to write + * @data: value to set in register + * @return true if register write successful, false otherwise + */ + bool (*write)(AwRtcState *s, uint32_t offset, uint32_t data); + +} AwRtcClass; + +#endif /* HW_MISC_ALLWINNER_RTC_H */ |